xref: /optee_os/core/arch/arm/include/sm/sm.h (revision 5b25c76ac40f830867e3d60800120ffd7874e8dc)
1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright (c) 2016, Linaro Limited
4  * Copyright (c) 2014, STMicroelectronics International N.V.
5  */
6 
7 #ifndef SM_SM_H
8 #define SM_SM_H
9 
10 #ifndef __ASSEMBLER__
11 
12 #include <compiler.h>
13 #include <types_ext.h>
14 
15 struct sm_unbanked_regs {
16 	uint32_t usr_sp;
17 	uint32_t usr_lr;
18 	uint32_t irq_spsr;
19 	uint32_t irq_sp;
20 	uint32_t irq_lr;
21 	uint32_t fiq_spsr;
22 	uint32_t fiq_sp;
23 	uint32_t fiq_lr;
24 	/*
25 	 * Note that fiq_r{8-12} are not saved here. Instead thread_fiq_handler
26 	 * preserves r{8-12}.
27 	 */
28 	uint32_t svc_spsr;
29 	uint32_t svc_sp;
30 	uint32_t svc_lr;
31 	uint32_t abt_spsr;
32 	uint32_t abt_sp;
33 	uint32_t abt_lr;
34 	uint32_t und_spsr;
35 	uint32_t und_sp;
36 	uint32_t und_lr;
37 #ifdef CFG_SM_NO_CYCLE_COUNTING
38 	uint32_t pmcr;
39 #endif
40 #ifdef CFG_FTRACE_SUPPORT
41 	uint32_t cntkctl;
42 	uint32_t pad;
43 #endif
44 };
45 
46 struct sm_nsec_ctx {
47 	struct sm_unbanked_regs ub_regs;
48 
49 	uint32_t r8;
50 	uint32_t r9;
51 	uint32_t r10;
52 	uint32_t r11;
53 	uint32_t r12;
54 
55 	uint32_t r0;
56 	uint32_t r1;
57 	uint32_t r2;
58 	uint32_t r3;
59 	uint32_t r4;
60 	uint32_t r5;
61 	uint32_t r6;
62 	uint32_t r7;
63 
64 	/* return state */
65 	uint32_t mon_lr;
66 	uint32_t mon_spsr;
67 };
68 
69 struct sm_sec_ctx {
70 	struct sm_unbanked_regs ub_regs;
71 
72 	uint32_t r0;
73 	uint32_t r1;
74 	uint32_t r2;
75 	uint32_t r3;
76 	uint32_t r4;
77 	uint32_t r5;
78 	uint32_t r6;
79 	uint32_t r7;
80 
81 	/* return state */
82 	uint32_t mon_lr;
83 	uint32_t mon_spsr;
84 };
85 
86 struct sm_ctx {
87 #ifndef CFG_SM_NO_CYCLE_COUNTING
88 	uint32_t pad;
89 #endif
90 	struct sm_sec_ctx sec;
91 #ifdef CFG_SM_NO_CYCLE_COUNTING
92 	uint32_t pad;
93 #endif
94 	struct sm_nsec_ctx nsec;
95 };
96 
97 /*
98  * The secure monitor reserves space at top of stack_tmp to hold struct
99  * sm_ctx.
100  */
101 #define SM_STACK_TMP_RESERVE_SIZE	sizeof(struct sm_ctx)
102 
103 
104 
105 /* Returns storage location of non-secure context for current CPU */
106 struct sm_nsec_ctx *sm_get_nsec_ctx(void);
107 
108 /* Returns stack pointer to use in monitor mode for current CPU */
109 void *sm_get_sp(void);
110 
111 /*
112  * Initializes secure monitor, must be called by each CPU
113  */
114 void sm_init(vaddr_t stack_pointer);
115 
116 enum sm_handler_ret {
117 	SM_HANDLER_SMC_HANDLED = 0,
118 	SM_HANDLER_PENDING_SMC,
119 };
120 
121 #ifdef CFG_SM_PLATFORM_HANDLER
122 /*
123  * Returns whether SMC was handled from platform handler in secure monitor
124  * or if it shall reach OP-TEE core .
125  */
126 enum sm_handler_ret sm_platform_handler(struct sm_ctx *ctx);
127 #endif
128 
129 void sm_save_unbanked_regs(struct sm_unbanked_regs *regs);
130 void sm_restore_unbanked_regs(struct sm_unbanked_regs *regs);
131 
132 #endif /*!__ASSEMBLER__*/
133 
134 /* 32 bit return value for sm_from_nsec() */
135 #define SM_EXIT_TO_NON_SECURE		0
136 #define SM_EXIT_TO_SECURE		1
137 
138 #endif /*SM_SM_H*/
139