xref: /optee_os/core/arch/arm/include/sm/sm.h (revision 1bb929836182ecb96d2d9d268daa807c67596396)
1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright (c) 2016, Linaro Limited
4  * Copyright (c) 2014, STMicroelectronics International N.V.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice,
11  * this list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright notice,
14  * this list of conditions and the following disclaimer in the documentation
15  * and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
21  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  * POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef SM_SM_H
31 #define SM_SM_H
32 
33 #include <compiler.h>
34 #include <types_ext.h>
35 
36 struct sm_mode_regs {
37 	uint32_t usr_sp;
38 	uint32_t usr_lr;
39 	uint32_t irq_spsr;
40 	uint32_t irq_sp;
41 	uint32_t irq_lr;
42 	uint32_t fiq_spsr;
43 	uint32_t fiq_sp;
44 	uint32_t fiq_lr;
45 	/*
46 	 * Note that fiq_r{8-12} are not saved here. Instead thread_fiq_handler
47 	 * preserves r{8-12}.
48 	 */
49 	uint32_t svc_spsr;
50 	uint32_t svc_sp;
51 	uint32_t svc_lr;
52 	uint32_t abt_spsr;
53 	uint32_t abt_sp;
54 	uint32_t abt_lr;
55 	uint32_t und_spsr;
56 	uint32_t und_sp;
57 	uint32_t und_lr;
58 };
59 
60 struct sm_nsec_ctx {
61 	struct sm_mode_regs mode_regs;
62 
63 	uint32_t r8;
64 	uint32_t r9;
65 	uint32_t r10;
66 	uint32_t r11;
67 	uint32_t r12;
68 
69 	uint32_t r0;
70 	uint32_t r1;
71 	uint32_t r2;
72 	uint32_t r3;
73 	uint32_t r4;
74 	uint32_t r5;
75 	uint32_t r6;
76 	uint32_t r7;
77 
78 	/* return state */
79 	uint32_t mon_lr;
80 	uint32_t mon_spsr;
81 };
82 
83 struct sm_sec_ctx {
84 	struct sm_mode_regs mode_regs;
85 
86 	uint32_t r0;
87 	uint32_t r1;
88 	uint32_t r2;
89 	uint32_t r3;
90 	uint32_t r4;
91 	uint32_t r5;
92 	uint32_t r6;
93 	uint32_t r7;
94 
95 	/* return state */
96 	uint32_t mon_lr;
97 	uint32_t mon_spsr;
98 };
99 
100 struct sm_ctx {
101 	uint32_t pad;
102 	struct sm_sec_ctx sec;
103 	struct sm_nsec_ctx nsec;
104 };
105 
106 /*
107  * The secure monitor reserves space at top of stack_tmp to hold struct
108  * sm_ctx.
109  */
110 #define SM_STACK_TMP_RESERVE_SIZE	sizeof(struct sm_ctx)
111 
112 
113 
114 /* Returns storage location of non-secure context for current CPU */
115 struct sm_nsec_ctx *sm_get_nsec_ctx(void);
116 
117 /* Returns stack pointer to use in monitor mode for current CPU */
118 void *sm_get_sp(void);
119 
120 /*
121  * Initializes secure monitor, must be called by each CPU
122  */
123 void sm_init(vaddr_t stack_pointer);
124 
125 #ifndef CFG_SM_PLATFORM_HANDLER
126 /*
127  * Returns false if we handled the monitor service and should now return
128  * back to the non-secure state
129  */
130 static inline bool sm_platform_handler(__unused struct sm_ctx *ctx)
131 {
132 	return true;
133 }
134 #else
135 bool sm_platform_handler(struct sm_ctx *ctx);
136 #endif
137 
138 void sm_save_modes_regs(struct sm_mode_regs *regs);
139 void sm_restore_modes_regs(struct sm_mode_regs *regs);
140 #endif /*SM_SM_H*/
141