xref: /optee_os/core/arch/arm/include/sm/sm.h (revision 0f4b02e607254a2bc42c352529d059143ed2fc80)
1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright (c) 2016, Linaro Limited
4  * Copyright (c) 2014, STMicroelectronics International N.V.
5  */
6 
7 #ifndef SM_SM_H
8 #define SM_SM_H
9 
10 #ifndef ASM
11 
12 #include <compiler.h>
13 #include <types_ext.h>
14 
15 struct sm_unbanked_regs {
16 	uint32_t usr_sp;
17 	uint32_t usr_lr;
18 	uint32_t irq_spsr;
19 	uint32_t irq_sp;
20 	uint32_t irq_lr;
21 	uint32_t fiq_spsr;
22 	uint32_t fiq_sp;
23 	uint32_t fiq_lr;
24 	/*
25 	 * Note that fiq_r{8-12} are not saved here. Instead thread_fiq_handler
26 	 * preserves r{8-12}.
27 	 */
28 	uint32_t svc_spsr;
29 	uint32_t svc_sp;
30 	uint32_t svc_lr;
31 	uint32_t abt_spsr;
32 	uint32_t abt_sp;
33 	uint32_t abt_lr;
34 	uint32_t und_spsr;
35 	uint32_t und_sp;
36 	uint32_t und_lr;
37 #ifdef CFG_SM_NO_CYCLE_COUNTING
38 	uint32_t pmcr;
39 #endif
40 };
41 
42 struct sm_nsec_ctx {
43 	struct sm_unbanked_regs ub_regs;
44 
45 	uint32_t r8;
46 	uint32_t r9;
47 	uint32_t r10;
48 	uint32_t r11;
49 	uint32_t r12;
50 
51 	uint32_t r0;
52 	uint32_t r1;
53 	uint32_t r2;
54 	uint32_t r3;
55 	uint32_t r4;
56 	uint32_t r5;
57 	uint32_t r6;
58 	uint32_t r7;
59 
60 	/* return state */
61 	uint32_t mon_lr;
62 	uint32_t mon_spsr;
63 };
64 
65 struct sm_sec_ctx {
66 	struct sm_unbanked_regs ub_regs;
67 
68 	uint32_t r0;
69 	uint32_t r1;
70 	uint32_t r2;
71 	uint32_t r3;
72 	uint32_t r4;
73 	uint32_t r5;
74 	uint32_t r6;
75 	uint32_t r7;
76 
77 	/* return state */
78 	uint32_t mon_lr;
79 	uint32_t mon_spsr;
80 };
81 
82 struct sm_ctx {
83 #ifndef CFG_SM_NO_CYCLE_COUNTING
84 	uint32_t pad;
85 #endif
86 	struct sm_sec_ctx sec;
87 #ifdef CFG_SM_NO_CYCLE_COUNTING
88 	uint32_t pad;
89 #endif
90 	struct sm_nsec_ctx nsec;
91 };
92 
93 /*
94  * The secure monitor reserves space at top of stack_tmp to hold struct
95  * sm_ctx.
96  */
97 #define SM_STACK_TMP_RESERVE_SIZE	sizeof(struct sm_ctx)
98 
99 
100 
101 /* Returns storage location of non-secure context for current CPU */
102 struct sm_nsec_ctx *sm_get_nsec_ctx(void);
103 
104 /* Returns stack pointer to use in monitor mode for current CPU */
105 void *sm_get_sp(void);
106 
107 /*
108  * Initializes secure monitor, must be called by each CPU
109  */
110 void sm_init(vaddr_t stack_pointer);
111 
112 enum sm_handler_ret {
113 	SM_HANDLER_SMC_HANDLED = 0,
114 	SM_HANDLER_PENDING_SMC,
115 };
116 
117 #ifdef CFG_SM_PLATFORM_HANDLER
118 /*
119  * Returns whether SMC was handled from platform handler in secure monitor
120  * or if it shall reach OP-TEE core .
121  */
122 enum sm_handler_ret sm_platform_handler(struct sm_ctx *ctx);
123 #endif
124 
125 void sm_save_unbanked_regs(struct sm_unbanked_regs *regs);
126 void sm_restore_unbanked_regs(struct sm_unbanked_regs *regs);
127 
128 #endif /*!ASM*/
129 
130 /* 32 bit return value for sm_from_nsec() */
131 #define SM_EXIT_TO_NON_SECURE		0
132 #define SM_EXIT_TO_SECURE		1
133 
134 #endif /*SM_SM_H*/
135