1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2017-2023, Linaro Limited 4 */ 5 #include <kernel/thread.h> 6 #include <sm/sm.h> 7 #include <stdint.h> 8 9 #define PSCI_VERSION_0_2 U(0x00000002) 10 #define PSCI_VERSION_1_0 U(0x00010000) 11 #define PSCI_VERSION_1_1 U(0x00010001) 12 #define PSCI_VERSION U(0x84000000) 13 #define PSCI_CPU_SUSPEND U(0x84000001) 14 #define PSCI_CPU_OFF U(0x84000002) 15 #define PSCI_CPU_ON U(0x84000003) 16 #define PSCI_CPU_ON_SMC64 (PSCI_CPU_ON | U(0x40000000)) 17 #define PSCI_AFFINITY_INFO U(0x84000004) 18 #define PSCI_MIGRATE U(0x84000005) 19 #define PSCI_MIGRATE_INFO_TYPE U(0x84000006) 20 #define PSCI_MIGRATE_INFO_UP_CPU U(0x84000007) 21 #define PSCI_SYSTEM_OFF U(0x84000008) 22 #define PSCI_SYSTEM_RESET U(0x84000009) 23 #define PSCI_PSCI_FEATURES U(0x8400000a) 24 #define PSCI_CPU_FREEZE U(0x8400000b) 25 #define PSCI_CPU_DEFAULT_SUSPEND U(0x8400000c) 26 #define PSCI_NODE_HW_STATE U(0x8400000d) 27 #define PSCI_SYSTEM_SUSPEND U(0x8400000e) 28 #define PSCI_PSCI_SET_SUSPEND_MODE U(0x8400000f) 29 #define PSCI_FN_STAT_RESIDENCY U(0x84000010) 30 #define PSCI_FN_STAT_COUNT U(0x84000011) 31 #define PSCI_SYSTEM_RESET2 U(0x84000012) 32 #define PSCI_MEM_PROTECT U(0x84000013) 33 #define PSCI_MEM_PROTECT_CHECK_RANGE U(0x84000014) 34 35 #define PSCI_NUM_CALLS U(21) 36 37 #define PSCI_AFFINITY_LEVEL_ON U(0) 38 #define PSCI_AFFINITY_LEVEL_OFF U(1) 39 #define PSCI_AFFINITY_LEVEL_ON_PENDING U(2) 40 41 #define PSCI_POWER_STATE_ID_MASK U(0xffff) 42 #define PSCI_POWER_STATE_ID_SHIFT U(0) 43 #define PSCI_POWER_STATE_TYPE_SHIFT U(16) 44 #define PSCI_POWER_STATE_TYPE_MASK BIT32(PSCI_POWER_STATE_TYPE_SHIFT) 45 #define PSCI_POWER_STATE_AFFL_SHIFT U(24) 46 #define PSCI_POWER_STATE_AFFL_MASK SHIFT_U32(0x3, \ 47 PSCI_POWER_STATE_AFFL_SHIFT) 48 49 #define PSCI_POWER_STATE_TYPE_STANDBY U(0) 50 #define PSCI_POWER_STATE_TYPE_POWER_DOWN U(1) 51 52 #define PSCI_RET_SUCCESS (0) 53 #define PSCI_RET_NOT_SUPPORTED (-1) 54 #define PSCI_RET_INVALID_PARAMETERS (-2) 55 #define PSCI_RET_DENIED (-3) 56 #define PSCI_RET_ALREADY_ON (-4) 57 #define PSCI_RET_ON_PENDING (-5) 58 #define PSCI_RET_INTERNAL_FAILURE (-6) 59 #define PSCI_RET_NOT_PRESENT (-7) 60 #define PSCI_RET_DISABLED (-8) 61 #define PSCI_RET_INVALID_ADDRESS (-9) 62 63 uint32_t psci_version(void); 64 int psci_cpu_suspend(uint32_t power_state, uintptr_t entry, 65 uint32_t context_id, struct sm_nsec_ctx *nsec); 66 int psci_cpu_off(void); 67 int psci_cpu_on(uint32_t cpu_id, uint32_t entry, uint32_t context_id); 68 int psci_affinity_info(uint32_t affinity, uint32_t lowest_affnity_level); 69 int psci_migrate(uint32_t cpu_id); 70 int psci_migrate_info_type(void); 71 int psci_migrate_info_up_cpu(void); 72 void psci_system_off(void); 73 void psci_system_reset(void); 74 int psci_features(uint32_t psci_fid); 75 int psci_system_reset2(uint32_t reset_type, uint32_t cookie); 76 int psci_mem_protect(uint32_t enable); 77 int psci_mem_chk_range(paddr_t base, size_t length); 78 int psci_node_hw_state(uint32_t cpu_id, uint32_t power_level); 79 int psci_system_suspend(uintptr_t entry, uint32_t context_id, 80 struct sm_nsec_ctx *nsec); 81 int psci_stat_residency(uint32_t cpu_id, uint32_t power_state); 82 int psci_stat_count(uint32_t cpu_id, uint32_t power_state); 83 void tee_psci_handler(struct thread_smc_args *args, struct sm_nsec_ctx *nsec); 84 85 void psci_armv7_cpu_off(void); 86