xref: /optee_os/core/arch/arm/dts/stm32mp215f-dk.dts (revision 7d731ee6901832b89183ea351c4e3ae4d2498c8f)

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
 * Copyright (C) 2025, STMicroelectronics - All Rights Reserved
 */

/dts-v1/;

#include <dt-bindings/clock/stm32mp21-clksrc.h>
#include "stm32mp215.dtsi"
#include "stm32mp21xf.dtsi"
#include "stm32mp215f-dk-ca35tdcid-rcc.dtsi"
#include "stm32mp215f-dk-ca35tdcid-rif.dtsi"
#include "stm32mp21-st-scmi-cfg.dtsi"

/ {
	model = "STMicroelectronics STM32MP215F-DK Discovery Board";
	compatible = "st,stm32mp215f-dk", "st,stm32mp215";

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;
	};
};

&rcc {
	st,c1msrd = <2>;
	st,clk_opp {
		st,ck_cpu1 {
			cfg_1 {
				hz = <1500000000>;
				st,clksrc = <0>;
				st,pll = <&pll1_cfg_1500MHz>;
			};

			cfg_2 {
				hz = <1200000000>;
				st,clksrc = <0>;
				st,pll = <&pll1_cfg_1200MHz>;
			};
		};
	};
};

&iwdg1 {
	timeout-sec = <32>;
	status = "okay";
};