xref: /optee_os/core/arch/arm/dts/stm32mp15xx-dkx.dtsi (revision 078e2ad44acd29c573e51358a473cd9b73c59aff)
11bf81340SEtienne Carriere// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
21bf81340SEtienne Carriere/*
31bf81340SEtienne Carriere * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
41bf81340SEtienne Carriere * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
51bf81340SEtienne Carriere */
61bf81340SEtienne Carriere
71bf81340SEtienne Carriere#include <dt-bindings/gpio/gpio.h>
81bf81340SEtienne Carriere#include <dt-bindings/mfd/st,stpmic1.h>
91bf81340SEtienne Carriere
101bf81340SEtienne Carriere/ {
111bf81340SEtienne Carriere	memory@c0000000 {
121bf81340SEtienne Carriere		device_type = "memory";
131bf81340SEtienne Carriere		reg = <0xc0000000 0x20000000>;
141bf81340SEtienne Carriere	};
151bf81340SEtienne Carriere
161bf81340SEtienne Carriere	reserved-memory {
171bf81340SEtienne Carriere		#address-cells = <1>;
181bf81340SEtienne Carriere		#size-cells = <1>;
191bf81340SEtienne Carriere		ranges;
201bf81340SEtienne Carriere
211bf81340SEtienne Carriere		mcuram2: mcuram2@10000000 {
221bf81340SEtienne Carriere			compatible = "shared-dma-pool";
231bf81340SEtienne Carriere			reg = <0x10000000 0x40000>;
241bf81340SEtienne Carriere			no-map;
251bf81340SEtienne Carriere		};
261bf81340SEtienne Carriere
271bf81340SEtienne Carriere		vdev0vring0: vdev0vring0@10040000 {
281bf81340SEtienne Carriere			compatible = "shared-dma-pool";
291bf81340SEtienne Carriere			reg = <0x10040000 0x1000>;
301bf81340SEtienne Carriere			no-map;
311bf81340SEtienne Carriere		};
321bf81340SEtienne Carriere
331bf81340SEtienne Carriere		vdev0vring1: vdev0vring1@10041000 {
341bf81340SEtienne Carriere			compatible = "shared-dma-pool";
351bf81340SEtienne Carriere			reg = <0x10041000 0x1000>;
361bf81340SEtienne Carriere			no-map;
371bf81340SEtienne Carriere		};
381bf81340SEtienne Carriere
391bf81340SEtienne Carriere		vdev0buffer: vdev0buffer@10042000 {
401bf81340SEtienne Carriere			compatible = "shared-dma-pool";
411bf81340SEtienne Carriere			reg = <0x10042000 0x4000>;
421bf81340SEtienne Carriere			no-map;
431bf81340SEtienne Carriere		};
441bf81340SEtienne Carriere
457c9920cbSArnaud Pouliquen		ipc_shmem: ipc-shmem@1004f000 {
467c9920cbSArnaud Pouliquen			compatible = "shared-dma-pool";
477c9920cbSArnaud Pouliquen			reg = <0x10048000 0x8000>;
487c9920cbSArnaud Pouliquen			no-map;
497c9920cbSArnaud Pouliquen		};
507c9920cbSArnaud Pouliquen
511bf81340SEtienne Carriere		mcuram: mcuram@30000000 {
521bf81340SEtienne Carriere			compatible = "shared-dma-pool";
531bf81340SEtienne Carriere			reg = <0x30000000 0x40000>;
541bf81340SEtienne Carriere			no-map;
551bf81340SEtienne Carriere		};
561bf81340SEtienne Carriere
571bf81340SEtienne Carriere		retram: retram@38000000 {
581bf81340SEtienne Carriere			compatible = "shared-dma-pool";
591bf81340SEtienne Carriere			reg = <0x38000000 0x10000>;
601bf81340SEtienne Carriere			no-map;
611bf81340SEtienne Carriere		};
621bf81340SEtienne Carriere
631bf81340SEtienne Carriere		gpu_reserved: gpu@d4000000 {
641bf81340SEtienne Carriere			reg = <0xd4000000 0x4000000>;
651bf81340SEtienne Carriere			no-map;
661bf81340SEtienne Carriere		};
671bf81340SEtienne Carriere	};
681bf81340SEtienne Carriere
691bf81340SEtienne Carriere	led {
701bf81340SEtienne Carriere		compatible = "gpio-leds";
7113bd79f4SJohann Neuhauser		led-blue {
721bf81340SEtienne Carriere			label = "heartbeat";
731bf81340SEtienne Carriere			gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
741bf81340SEtienne Carriere			linux,default-trigger = "heartbeat";
751bf81340SEtienne Carriere			default-state = "off";
76e076782bSEtienne Carriere			status = "disabled";
771bf81340SEtienne Carriere		};
781bf81340SEtienne Carriere	};
791bf81340SEtienne Carriere
801bf81340SEtienne Carriere	sound {
811bf81340SEtienne Carriere		compatible = "audio-graph-card";
821bf81340SEtienne Carriere		label = "STM32MP1-DK";
831bf81340SEtienne Carriere		routing =
841bf81340SEtienne Carriere			"Playback" , "MCLK",
851bf81340SEtienne Carriere			"Capture" , "MCLK",
861bf81340SEtienne Carriere			"MICL" , "Mic Bias";
871bf81340SEtienne Carriere		dais = <&sai2a_port &sai2b_port &i2s2_port>;
88e076782bSEtienne Carriere		status = "disabled";
891bf81340SEtienne Carriere	};
9013bd79f4SJohann Neuhauser
9113bd79f4SJohann Neuhauser	vin: vin {
9213bd79f4SJohann Neuhauser		compatible = "regulator-fixed";
9313bd79f4SJohann Neuhauser		regulator-name = "vin";
9413bd79f4SJohann Neuhauser		regulator-min-microvolt = <5000000>;
9513bd79f4SJohann Neuhauser		regulator-max-microvolt = <5000000>;
9613bd79f4SJohann Neuhauser		regulator-always-on;
9713bd79f4SJohann Neuhauser	};
981bf81340SEtienne Carriere};
991bf81340SEtienne Carriere
1001bf81340SEtienne Carriere&adc {
1011bf81340SEtienne Carriere	pinctrl-names = "default";
1021bf81340SEtienne Carriere	pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
1031bf81340SEtienne Carriere	vdd-supply = <&vdd>;
1041bf81340SEtienne Carriere	vdda-supply = <&vdd>;
1051bf81340SEtienne Carriere	vref-supply = <&vrefbuf>;
1061bf81340SEtienne Carriere	status = "disabled";
1071bf81340SEtienne Carriere	adc1: adc@0 {
1081bf81340SEtienne Carriere		/*
1091bf81340SEtienne Carriere		 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
1101bf81340SEtienne Carriere		 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
1111bf81340SEtienne Carriere		 * 5 * (56 + 47kOhms) * 5pF => 2.5us.
1121bf81340SEtienne Carriere		 * Use arbitrary margin here (e.g. 5us).
1131bf81340SEtienne Carriere		 */
1141bf81340SEtienne Carriere		st,min-sample-time-nsecs = <5000>;
1151bf81340SEtienne Carriere		/* AIN connector, USB Type-C CC1 & CC2 */
1161bf81340SEtienne Carriere		st,adc-channels = <0 1 6 13 18 19>;
1171bf81340SEtienne Carriere		status = "okay";
1181bf81340SEtienne Carriere	};
1191bf81340SEtienne Carriere	adc2: adc@100 {
1201bf81340SEtienne Carriere		/* AIN connector, USB Type-C CC1 & CC2 */
1211bf81340SEtienne Carriere		st,adc-channels = <0 1 2 6 18 19>;
1221bf81340SEtienne Carriere		st,min-sample-time-nsecs = <5000>;
1231bf81340SEtienne Carriere		status = "okay";
1241bf81340SEtienne Carriere	};
1251bf81340SEtienne Carriere};
1261bf81340SEtienne Carriere
1271bf81340SEtienne Carriere&cec {
1281bf81340SEtienne Carriere	pinctrl-names = "default", "sleep";
1291bf81340SEtienne Carriere	pinctrl-0 = <&cec_pins_b>;
13013bd79f4SJohann Neuhauser	pinctrl-1 = <&cec_sleep_pins_b>;
131e076782bSEtienne Carriere	status = "disabled";
13213bd79f4SJohann Neuhauser};
13313bd79f4SJohann Neuhauser
13413bd79f4SJohann Neuhauser&crc1 {
135e076782bSEtienne Carriere	status = "disabled";
13613bd79f4SJohann Neuhauser};
13713bd79f4SJohann Neuhauser
13813bd79f4SJohann Neuhauser&dts {
139e076782bSEtienne Carriere	status = "disabled";
1401bf81340SEtienne Carriere};
1411bf81340SEtienne Carriere
1421bf81340SEtienne Carriere&ethernet0 {
143e076782bSEtienne Carriere	status = "disabled";
1441bf81340SEtienne Carriere	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
14513bd79f4SJohann Neuhauser	pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
1461bf81340SEtienne Carriere	pinctrl-names = "default", "sleep";
1471bf81340SEtienne Carriere	phy-mode = "rgmii-id";
1481bf81340SEtienne Carriere	max-speed = <1000>;
1491bf81340SEtienne Carriere	phy-handle = <&phy0>;
1501bf81340SEtienne Carriere
1511bf81340SEtienne Carriere	mdio0 {
1521bf81340SEtienne Carriere		#address-cells = <1>;
1531bf81340SEtienne Carriere		#size-cells = <0>;
1541bf81340SEtienne Carriere		compatible = "snps,dwmac-mdio";
1551bf81340SEtienne Carriere		phy0: ethernet-phy@0 {
1561bf81340SEtienne Carriere			reg = <0>;
1571bf81340SEtienne Carriere		};
1581bf81340SEtienne Carriere	};
1591bf81340SEtienne Carriere};
1601bf81340SEtienne Carriere
1611bf81340SEtienne Carriere&gpu {
1621bf81340SEtienne Carriere	contiguous-area = <&gpu_reserved>;
16313bd79f4SJohann Neuhauser};
16413bd79f4SJohann Neuhauser
16513bd79f4SJohann Neuhauser&hash1 {
166e076782bSEtienne Carriere	status = "disabled";
1671bf81340SEtienne Carriere};
1681bf81340SEtienne Carriere
1691bf81340SEtienne Carriere&i2c1 {
1701bf81340SEtienne Carriere	pinctrl-names = "default", "sleep";
1711bf81340SEtienne Carriere	pinctrl-0 = <&i2c1_pins_a>;
17213bd79f4SJohann Neuhauser	pinctrl-1 = <&i2c1_sleep_pins_a>;
1731bf81340SEtienne Carriere	i2c-scl-rising-time-ns = <100>;
1741bf81340SEtienne Carriere	i2c-scl-falling-time-ns = <7>;
175e076782bSEtienne Carriere	status = "disabled";
1761bf81340SEtienne Carriere	/delete-property/dmas;
1771bf81340SEtienne Carriere	/delete-property/dma-names;
1781bf81340SEtienne Carriere
1791bf81340SEtienne Carriere	hdmi-transmitter@39 {
1801bf81340SEtienne Carriere		compatible = "sil,sii9022";
1811bf81340SEtienne Carriere		reg = <0x39>;
1821bf81340SEtienne Carriere		iovcc-supply = <&v3v3_hdmi>;
1831bf81340SEtienne Carriere		cvcc12-supply = <&v1v2_hdmi>;
1841bf81340SEtienne Carriere		reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
1851bf81340SEtienne Carriere		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
1861bf81340SEtienne Carriere		interrupt-parent = <&gpiog>;
1871bf81340SEtienne Carriere		#sound-dai-cells = <0>;
1881bf81340SEtienne Carriere		status = "okay";
1891bf81340SEtienne Carriere
1901bf81340SEtienne Carriere		ports {
1911bf81340SEtienne Carriere			#address-cells = <1>;
1921bf81340SEtienne Carriere			#size-cells = <0>;
1931bf81340SEtienne Carriere
1941bf81340SEtienne Carriere			port@0 {
1951bf81340SEtienne Carriere				reg = <0>;
1961bf81340SEtienne Carriere				sii9022_in: endpoint {
1971bf81340SEtienne Carriere					remote-endpoint = <&ltdc_ep0_out>;
1981bf81340SEtienne Carriere				};
1991bf81340SEtienne Carriere			};
2001bf81340SEtienne Carriere
2011bf81340SEtienne Carriere			port@3 {
2021bf81340SEtienne Carriere				reg = <3>;
2031bf81340SEtienne Carriere				sii9022_tx_endpoint: endpoint {
2041bf81340SEtienne Carriere					remote-endpoint = <&i2s2_endpoint>;
2051bf81340SEtienne Carriere				};
2061bf81340SEtienne Carriere			};
2071bf81340SEtienne Carriere		};
2081bf81340SEtienne Carriere	};
2091bf81340SEtienne Carriere
2101bf81340SEtienne Carriere	cs42l51: cs42l51@4a {
2111bf81340SEtienne Carriere		compatible = "cirrus,cs42l51";
2121bf81340SEtienne Carriere		reg = <0x4a>;
2131bf81340SEtienne Carriere		#sound-dai-cells = <0>;
2141bf81340SEtienne Carriere		VL-supply = <&v3v3>;
2151bf81340SEtienne Carriere		VD-supply = <&v1v8_audio>;
2161bf81340SEtienne Carriere		VA-supply = <&v1v8_audio>;
2171bf81340SEtienne Carriere		VAHP-supply = <&v1v8_audio>;
2181bf81340SEtienne Carriere		reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
2191bf81340SEtienne Carriere		clocks = <&sai2a>;
2201bf81340SEtienne Carriere		clock-names = "MCLK";
2211bf81340SEtienne Carriere		status = "okay";
2221bf81340SEtienne Carriere
2231bf81340SEtienne Carriere		cs42l51_port: port {
2241bf81340SEtienne Carriere			#address-cells = <1>;
2251bf81340SEtienne Carriere			#size-cells = <0>;
2261bf81340SEtienne Carriere
2271bf81340SEtienne Carriere			cs42l51_tx_endpoint: endpoint@0 {
2281bf81340SEtienne Carriere				reg = <0>;
2291bf81340SEtienne Carriere				remote-endpoint = <&sai2a_endpoint>;
23013bd79f4SJohann Neuhauser				frame-master = <&cs42l51_tx_endpoint>;
23113bd79f4SJohann Neuhauser				bitclock-master = <&cs42l51_tx_endpoint>;
2321bf81340SEtienne Carriere			};
2331bf81340SEtienne Carriere
2341bf81340SEtienne Carriere			cs42l51_rx_endpoint: endpoint@1 {
2351bf81340SEtienne Carriere				reg = <1>;
2361bf81340SEtienne Carriere				remote-endpoint = <&sai2b_endpoint>;
23713bd79f4SJohann Neuhauser				frame-master = <&cs42l51_rx_endpoint>;
23813bd79f4SJohann Neuhauser				bitclock-master = <&cs42l51_rx_endpoint>;
2391bf81340SEtienne Carriere			};
2401bf81340SEtienne Carriere		};
2411bf81340SEtienne Carriere	};
2421bf81340SEtienne Carriere};
2431bf81340SEtienne Carriere
2441bf81340SEtienne Carriere&i2c4 {
24523df205fSGatien Chevallier	compatible = "st,stm32mp15-i2c-non-secure";
24613bd79f4SJohann Neuhauser	pinctrl-names = "default", "sleep";
2471bf81340SEtienne Carriere	pinctrl-0 = <&i2c4_pins_a>;
24813bd79f4SJohann Neuhauser	pinctrl-1 = <&i2c4_sleep_pins_a>;
2491bf81340SEtienne Carriere	i2c-scl-rising-time-ns = <185>;
2501bf81340SEtienne Carriere	i2c-scl-falling-time-ns = <20>;
25113bd79f4SJohann Neuhauser	clock-frequency = <400000>;
2521bf81340SEtienne Carriere	status = "okay";
2531bf81340SEtienne Carriere	/* spare dmas for other usage */
2541bf81340SEtienne Carriere	/delete-property/dmas;
2551bf81340SEtienne Carriere	/delete-property/dma-names;
2561bf81340SEtienne Carriere
25713bd79f4SJohann Neuhauser	stusb1600@28 {
25813bd79f4SJohann Neuhauser		compatible = "st,stusb1600";
25913bd79f4SJohann Neuhauser		reg = <0x28>;
26013bd79f4SJohann Neuhauser		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
26113bd79f4SJohann Neuhauser		interrupt-parent = <&gpioi>;
26213bd79f4SJohann Neuhauser		pinctrl-names = "default";
26313bd79f4SJohann Neuhauser		pinctrl-0 = <&stusb1600_pins_a>;
26413bd79f4SJohann Neuhauser		status = "okay";
26513bd79f4SJohann Neuhauser		vdd-supply = <&vin>;
26613bd79f4SJohann Neuhauser
26713bd79f4SJohann Neuhauser		connector {
26813bd79f4SJohann Neuhauser			compatible = "usb-c-connector";
26913bd79f4SJohann Neuhauser			label = "USB-C";
27013bd79f4SJohann Neuhauser			power-role = "dual";
27113bd79f4SJohann Neuhauser			typec-power-opmode = "default";
27213bd79f4SJohann Neuhauser
27313bd79f4SJohann Neuhauser			port {
27413bd79f4SJohann Neuhauser				con_usbotg_hs_ep: endpoint {
27513bd79f4SJohann Neuhauser					remote-endpoint = <&usbotg_hs_ep>;
27613bd79f4SJohann Neuhauser				};
27713bd79f4SJohann Neuhauser			};
27813bd79f4SJohann Neuhauser		};
27913bd79f4SJohann Neuhauser	};
28013bd79f4SJohann Neuhauser
2811bf81340SEtienne Carriere	pmic: stpmic@33 {
2821bf81340SEtienne Carriere		compatible = "st,stpmic1";
2831bf81340SEtienne Carriere		reg = <0x33>;
2841bf81340SEtienne Carriere		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
2851bf81340SEtienne Carriere		interrupt-controller;
2861bf81340SEtienne Carriere		#interrupt-cells = <2>;
2871bf81340SEtienne Carriere		status = "okay";
2881bf81340SEtienne Carriere
2891bf81340SEtienne Carriere		regulators {
2901bf81340SEtienne Carriere			compatible = "st,stpmic1-regulators";
29113bd79f4SJohann Neuhauser			buck1-supply = <&vin>;
29213bd79f4SJohann Neuhauser			buck2-supply = <&vin>;
29313bd79f4SJohann Neuhauser			buck3-supply = <&vin>;
29413bd79f4SJohann Neuhauser			buck4-supply = <&vin>;
2951bf81340SEtienne Carriere			ldo1-supply = <&v3v3>;
29613bd79f4SJohann Neuhauser			ldo2-supply = <&vin>;
2971bf81340SEtienne Carriere			ldo3-supply = <&vdd_ddr>;
29813bd79f4SJohann Neuhauser			ldo4-supply = <&vin>;
29913bd79f4SJohann Neuhauser			ldo5-supply = <&vin>;
3001bf81340SEtienne Carriere			ldo6-supply = <&v3v3>;
30113bd79f4SJohann Neuhauser			vref_ddr-supply = <&vin>;
30213bd79f4SJohann Neuhauser			boost-supply = <&vin>;
3031bf81340SEtienne Carriere			pwr_sw1-supply = <&bst_out>;
3041bf81340SEtienne Carriere			pwr_sw2-supply = <&bst_out>;
3051bf81340SEtienne Carriere
3061bf81340SEtienne Carriere			vddcore: buck1 {
3071bf81340SEtienne Carriere				regulator-name = "vddcore";
3081bf81340SEtienne Carriere				regulator-min-microvolt = <1200000>;
3091bf81340SEtienne Carriere				regulator-max-microvolt = <1350000>;
3101bf81340SEtienne Carriere				regulator-always-on;
3111bf81340SEtienne Carriere				regulator-initial-mode = <0>;
3121bf81340SEtienne Carriere				regulator-over-current-protection;
3131bf81340SEtienne Carriere			};
3141bf81340SEtienne Carriere
3151bf81340SEtienne Carriere			vdd_ddr: buck2 {
3161bf81340SEtienne Carriere				regulator-name = "vdd_ddr";
3171bf81340SEtienne Carriere				regulator-min-microvolt = <1350000>;
3181bf81340SEtienne Carriere				regulator-max-microvolt = <1350000>;
3191bf81340SEtienne Carriere				regulator-always-on;
3201bf81340SEtienne Carriere				regulator-initial-mode = <0>;
3211bf81340SEtienne Carriere				regulator-over-current-protection;
3221bf81340SEtienne Carriere			};
3231bf81340SEtienne Carriere
3241bf81340SEtienne Carriere			vdd: buck3 {
3251bf81340SEtienne Carriere				regulator-name = "vdd";
3261bf81340SEtienne Carriere				regulator-min-microvolt = <3300000>;
3271bf81340SEtienne Carriere				regulator-max-microvolt = <3300000>;
3281bf81340SEtienne Carriere				regulator-always-on;
3291bf81340SEtienne Carriere				st,mask-reset;
3301bf81340SEtienne Carriere				regulator-initial-mode = <0>;
3311bf81340SEtienne Carriere				regulator-over-current-protection;
3321bf81340SEtienne Carriere			};
3331bf81340SEtienne Carriere
3341bf81340SEtienne Carriere			v3v3: buck4 {
3351bf81340SEtienne Carriere				regulator-name = "v3v3";
3361bf81340SEtienne Carriere				regulator-min-microvolt = <3300000>;
3371bf81340SEtienne Carriere				regulator-max-microvolt = <3300000>;
3381bf81340SEtienne Carriere				regulator-always-on;
3391bf81340SEtienne Carriere				regulator-over-current-protection;
3401bf81340SEtienne Carriere				regulator-initial-mode = <0>;
3411bf81340SEtienne Carriere			};
3421bf81340SEtienne Carriere
3431bf81340SEtienne Carriere			v1v8_audio: ldo1 {
3441bf81340SEtienne Carriere				regulator-name = "v1v8_audio";
3451bf81340SEtienne Carriere				regulator-min-microvolt = <1800000>;
3461bf81340SEtienne Carriere				regulator-max-microvolt = <1800000>;
3471bf81340SEtienne Carriere				regulator-always-on;
3481bf81340SEtienne Carriere				interrupts = <IT_CURLIM_LDO1 0>;
3491bf81340SEtienne Carriere			};
3501bf81340SEtienne Carriere
3511bf81340SEtienne Carriere			v3v3_hdmi: ldo2 {
3521bf81340SEtienne Carriere				regulator-name = "v3v3_hdmi";
3531bf81340SEtienne Carriere				regulator-min-microvolt = <3300000>;
3541bf81340SEtienne Carriere				regulator-max-microvolt = <3300000>;
3551bf81340SEtienne Carriere				regulator-always-on;
3561bf81340SEtienne Carriere				interrupts = <IT_CURLIM_LDO2 0>;
3571bf81340SEtienne Carriere			};
3581bf81340SEtienne Carriere
3591bf81340SEtienne Carriere			vtt_ddr: ldo3 {
3601bf81340SEtienne Carriere				regulator-name = "vtt_ddr";
3611bf81340SEtienne Carriere				regulator-min-microvolt = <500000>;
3621bf81340SEtienne Carriere				regulator-max-microvolt = <750000>;
3631bf81340SEtienne Carriere				regulator-always-on;
3641bf81340SEtienne Carriere				regulator-over-current-protection;
3651bf81340SEtienne Carriere			};
3661bf81340SEtienne Carriere
3671bf81340SEtienne Carriere			vdd_usb: ldo4 {
3681bf81340SEtienne Carriere				regulator-name = "vdd_usb";
3691bf81340SEtienne Carriere				interrupts = <IT_CURLIM_LDO4 0>;
37088747678SEtienne Carriere				regulator-always-on;
3711bf81340SEtienne Carriere			};
3721bf81340SEtienne Carriere
3731bf81340SEtienne Carriere			vdda: ldo5 {
3741bf81340SEtienne Carriere				regulator-name = "vdda";
3751bf81340SEtienne Carriere				regulator-min-microvolt = <2900000>;
3761bf81340SEtienne Carriere				regulator-max-microvolt = <2900000>;
3771bf81340SEtienne Carriere				interrupts = <IT_CURLIM_LDO5 0>;
3781bf81340SEtienne Carriere				regulator-boot-on;
3791bf81340SEtienne Carriere			};
3801bf81340SEtienne Carriere
3811bf81340SEtienne Carriere			v1v2_hdmi: ldo6 {
3821bf81340SEtienne Carriere				regulator-name = "v1v2_hdmi";
3831bf81340SEtienne Carriere				regulator-min-microvolt = <1200000>;
3841bf81340SEtienne Carriere				regulator-max-microvolt = <1200000>;
3851bf81340SEtienne Carriere				regulator-always-on;
3861bf81340SEtienne Carriere				interrupts = <IT_CURLIM_LDO6 0>;
3871bf81340SEtienne Carriere			};
3881bf81340SEtienne Carriere
3891bf81340SEtienne Carriere			vref_ddr: vref_ddr {
3901bf81340SEtienne Carriere				regulator-name = "vref_ddr";
3911bf81340SEtienne Carriere				regulator-always-on;
3921bf81340SEtienne Carriere			};
3931bf81340SEtienne Carriere
3941bf81340SEtienne Carriere			 bst_out: boost {
3951bf81340SEtienne Carriere				regulator-name = "bst_out";
3961bf81340SEtienne Carriere				interrupts = <IT_OCP_BOOST 0>;
3971bf81340SEtienne Carriere			 };
3981bf81340SEtienne Carriere
3991bf81340SEtienne Carriere			vbus_otg: pwr_sw1 {
4001bf81340SEtienne Carriere				regulator-name = "vbus_otg";
4011bf81340SEtienne Carriere				interrupts = <IT_OCP_OTG 0>;
4021bf81340SEtienne Carriere			 };
4031bf81340SEtienne Carriere
4041bf81340SEtienne Carriere			 vbus_sw: pwr_sw2 {
4051bf81340SEtienne Carriere				regulator-name = "vbus_sw";
4061bf81340SEtienne Carriere				interrupts = <IT_OCP_SWOUT 0>;
4071bf81340SEtienne Carriere				regulator-active-discharge = <1>;
4081bf81340SEtienne Carriere			 };
4091bf81340SEtienne Carriere		};
4101bf81340SEtienne Carriere
4111bf81340SEtienne Carriere		onkey {
4121bf81340SEtienne Carriere			compatible = "st,stpmic1-onkey";
4131bf81340SEtienne Carriere			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
4141bf81340SEtienne Carriere			interrupt-names = "onkey-falling", "onkey-rising";
4151bf81340SEtienne Carriere			power-off-time-sec = <10>;
4161bf81340SEtienne Carriere			status = "okay";
4171bf81340SEtienne Carriere		};
4181bf81340SEtienne Carriere
4191bf81340SEtienne Carriere		watchdog {
4201bf81340SEtienne Carriere			compatible = "st,stpmic1-wdt";
4211bf81340SEtienne Carriere			status = "disabled";
4221bf81340SEtienne Carriere		};
4231bf81340SEtienne Carriere	};
4241bf81340SEtienne Carriere};
4251bf81340SEtienne Carriere
42613bd79f4SJohann Neuhauser&i2c5 {
42713bd79f4SJohann Neuhauser	pinctrl-names = "default", "sleep";
42813bd79f4SJohann Neuhauser	pinctrl-0 = <&i2c5_pins_a>;
42913bd79f4SJohann Neuhauser	pinctrl-1 = <&i2c5_sleep_pins_a>;
43013bd79f4SJohann Neuhauser	i2c-scl-rising-time-ns = <185>;
43113bd79f4SJohann Neuhauser	i2c-scl-falling-time-ns = <20>;
43213bd79f4SJohann Neuhauser	clock-frequency = <400000>;
43313bd79f4SJohann Neuhauser	/* spare dmas for other usage */
43413bd79f4SJohann Neuhauser	/delete-property/dmas;
43513bd79f4SJohann Neuhauser	/delete-property/dma-names;
43613bd79f4SJohann Neuhauser	status = "disabled";
43713bd79f4SJohann Neuhauser};
43813bd79f4SJohann Neuhauser
4391bf81340SEtienne Carriere&i2s2 {
4401bf81340SEtienne Carriere	clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
4411bf81340SEtienne Carriere	clock-names = "pclk", "i2sclk", "x8k", "x11k";
4421bf81340SEtienne Carriere	pinctrl-names = "default", "sleep";
4431bf81340SEtienne Carriere	pinctrl-0 = <&i2s2_pins_a>;
44413bd79f4SJohann Neuhauser	pinctrl-1 = <&i2s2_sleep_pins_a>;
445e076782bSEtienne Carriere	status = "disabled";
4461bf81340SEtienne Carriere
4471bf81340SEtienne Carriere	i2s2_port: port {
4481bf81340SEtienne Carriere		i2s2_endpoint: endpoint {
4491bf81340SEtienne Carriere			remote-endpoint = <&sii9022_tx_endpoint>;
4501bf81340SEtienne Carriere			format = "i2s";
4511bf81340SEtienne Carriere			mclk-fs = <256>;
4521bf81340SEtienne Carriere		};
4531bf81340SEtienne Carriere	};
4541bf81340SEtienne Carriere};
4551bf81340SEtienne Carriere
4561bf81340SEtienne Carriere&ipcc {
457e076782bSEtienne Carriere	status = "disabled";
4581bf81340SEtienne Carriere};
4591bf81340SEtienne Carriere
46081ed3bceSEtienne Carriere&iwdg1 {
46181ed3bceSEtienne Carriere	timeout-sec = <32>;
46223ca2138SEtienne Carriere	status = "okay";
46381ed3bceSEtienne Carriere};
46481ed3bceSEtienne Carriere
4651bf81340SEtienne Carriere&iwdg2 {
4661bf81340SEtienne Carriere	timeout-sec = <32>;
467c825ffc9SEtienne Carriere	status = "disabled";
4681bf81340SEtienne Carriere};
4691bf81340SEtienne Carriere
4701bf81340SEtienne Carriere&ltdc {
4711bf81340SEtienne Carriere	pinctrl-names = "default", "sleep";
4721bf81340SEtienne Carriere	pinctrl-0 = <&ltdc_pins_a>;
47313bd79f4SJohann Neuhauser	pinctrl-1 = <&ltdc_sleep_pins_a>;
474e076782bSEtienne Carriere	status = "disabled";
4751bf81340SEtienne Carriere
4761bf81340SEtienne Carriere	port {
4771bf81340SEtienne Carriere		ltdc_ep0_out: endpoint@0 {
4781bf81340SEtienne Carriere			reg = <0>;
4791bf81340SEtienne Carriere			remote-endpoint = <&sii9022_in>;
4801bf81340SEtienne Carriere		};
4811bf81340SEtienne Carriere	};
4821bf81340SEtienne Carriere};
4831bf81340SEtienne Carriere
4841bf81340SEtienne Carriere&m4_rproc {
4851bf81340SEtienne Carriere	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
4867c9920cbSArnaud Pouliquen			<&vdev0vring1>, <&vdev0buffer>, <&ipc_shmem>;
48713bd79f4SJohann Neuhauser	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
48813bd79f4SJohann Neuhauser	mbox-names = "vq0", "vq1", "shutdown", "detach";
4891bf81340SEtienne Carriere	interrupt-parent = <&exti>;
4901bf81340SEtienne Carriere	interrupts = <68 1>;
4911bf81340SEtienne Carriere	status = "okay";
4921bf81340SEtienne Carriere};
4931bf81340SEtienne Carriere
4941bf81340SEtienne Carriere&pwr_regulators {
4951bf81340SEtienne Carriere	vdd-supply = <&vdd>;
4961bf81340SEtienne Carriere	vdd_3v3_usbfs-supply = <&vdd_usb>;
4971bf81340SEtienne Carriere};
4981bf81340SEtienne Carriere
49908278885SEtienne Carriere&rcc {
50036f1fd6dSEtienne Carriere	compatible = "st,stm32mp1-rcc";
50108278885SEtienne Carriere	status = "okay";
50208278885SEtienne Carriere};
50308278885SEtienne Carriere
5041bf81340SEtienne Carriere&rng1 {
5051bf81340SEtienne Carriere	status = "okay";
5061bf81340SEtienne Carriere};
5071bf81340SEtienne Carriere
5081bf81340SEtienne Carriere&sai2 {
5091bf81340SEtienne Carriere	clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
5101bf81340SEtienne Carriere	clock-names = "pclk", "x8k", "x11k";
5111bf81340SEtienne Carriere	pinctrl-names = "default", "sleep";
5121bf81340SEtienne Carriere	pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
5131bf81340SEtienne Carriere	pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
514e076782bSEtienne Carriere	status = "disabled";
5151bf81340SEtienne Carriere
5161bf81340SEtienne Carriere	sai2a: audio-controller@4400b004 {
5171bf81340SEtienne Carriere		#clock-cells = <0>;
5181bf81340SEtienne Carriere		dma-names = "tx";
5191bf81340SEtienne Carriere		clocks = <&rcc SAI2_K>;
5201bf81340SEtienne Carriere		clock-names = "sai_ck";
5211bf81340SEtienne Carriere		status = "okay";
5221bf81340SEtienne Carriere
5231bf81340SEtienne Carriere		sai2a_port: port {
5241bf81340SEtienne Carriere			sai2a_endpoint: endpoint {
5251bf81340SEtienne Carriere				remote-endpoint = <&cs42l51_tx_endpoint>;
5261bf81340SEtienne Carriere				format = "i2s";
5271bf81340SEtienne Carriere				mclk-fs = <256>;
5281bf81340SEtienne Carriere				dai-tdm-slot-num = <2>;
5291bf81340SEtienne Carriere				dai-tdm-slot-width = <32>;
5301bf81340SEtienne Carriere			};
5311bf81340SEtienne Carriere		};
5321bf81340SEtienne Carriere	};
5331bf81340SEtienne Carriere
5341bf81340SEtienne Carriere	sai2b: audio-controller@4400b024 {
5351bf81340SEtienne Carriere		dma-names = "rx";
5361bf81340SEtienne Carriere		st,sync = <&sai2a 2>;
5371bf81340SEtienne Carriere		clocks = <&rcc SAI2_K>, <&sai2a>;
5381bf81340SEtienne Carriere		clock-names = "sai_ck", "MCLK";
5391bf81340SEtienne Carriere		status = "okay";
5401bf81340SEtienne Carriere
5411bf81340SEtienne Carriere		sai2b_port: port {
5421bf81340SEtienne Carriere			sai2b_endpoint: endpoint {
5431bf81340SEtienne Carriere				remote-endpoint = <&cs42l51_rx_endpoint>;
5441bf81340SEtienne Carriere				format = "i2s";
5451bf81340SEtienne Carriere				mclk-fs = <256>;
5461bf81340SEtienne Carriere				dai-tdm-slot-num = <2>;
5471bf81340SEtienne Carriere				dai-tdm-slot-width = <32>;
5481bf81340SEtienne Carriere			};
5491bf81340SEtienne Carriere		};
5501bf81340SEtienne Carriere	};
5511bf81340SEtienne Carriere};
5521bf81340SEtienne Carriere
5531bf81340SEtienne Carriere&sdmmc1 {
5541bf81340SEtienne Carriere	pinctrl-names = "default", "opendrain", "sleep";
5551bf81340SEtienne Carriere	pinctrl-0 = <&sdmmc1_b4_pins_a>;
5561bf81340SEtienne Carriere	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
5571bf81340SEtienne Carriere	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
55813bd79f4SJohann Neuhauser	cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
55913bd79f4SJohann Neuhauser	disable-wp;
5601bf81340SEtienne Carriere	st,neg-edge;
5611bf81340SEtienne Carriere	bus-width = <4>;
5621bf81340SEtienne Carriere	vmmc-supply = <&v3v3>;
563e076782bSEtienne Carriere	status = "disabled";
5641bf81340SEtienne Carriere};
5651bf81340SEtienne Carriere
5661bf81340SEtienne Carriere&sdmmc3 {
5671bf81340SEtienne Carriere	pinctrl-names = "default", "opendrain", "sleep";
5681bf81340SEtienne Carriere	pinctrl-0 = <&sdmmc3_b4_pins_a>;
5691bf81340SEtienne Carriere	pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
5701bf81340SEtienne Carriere	pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
5711bf81340SEtienne Carriere	broken-cd;
5721bf81340SEtienne Carriere	st,neg-edge;
5731bf81340SEtienne Carriere	bus-width = <4>;
5741bf81340SEtienne Carriere	vmmc-supply = <&v3v3>;
5751bf81340SEtienne Carriere	status = "disabled";
5761bf81340SEtienne Carriere};
5771bf81340SEtienne Carriere
578*fc86f118SGatien Chevallier&tamp {
579*fc86f118SGatien Chevallier	st,tamp-passive-nb-sample = <4>;
580*fc86f118SGatien Chevallier	st,tamp-passive-sample-clk-div = <16384>;
581*fc86f118SGatien Chevallier};
582*fc86f118SGatien Chevallier
5831bf81340SEtienne Carriere&timers1 {
5841bf81340SEtienne Carriere	/* spare dmas for other usage */
5851bf81340SEtienne Carriere	/delete-property/dmas;
5861bf81340SEtienne Carriere	/delete-property/dma-names;
5871bf81340SEtienne Carriere	status = "disabled";
5881bf81340SEtienne Carriere	pwm {
5891bf81340SEtienne Carriere		pinctrl-0 = <&pwm1_pins_a>;
5901bf81340SEtienne Carriere		pinctrl-1 = <&pwm1_sleep_pins_a>;
5911bf81340SEtienne Carriere		pinctrl-names = "default", "sleep";
5921bf81340SEtienne Carriere		status = "okay";
5931bf81340SEtienne Carriere	};
5941bf81340SEtienne Carriere	timer@0 {
5951bf81340SEtienne Carriere		status = "okay";
5961bf81340SEtienne Carriere	};
5971bf81340SEtienne Carriere};
5981bf81340SEtienne Carriere
5991bf81340SEtienne Carriere&timers3 {
6001bf81340SEtienne Carriere	/delete-property/dmas;
6011bf81340SEtienne Carriere	/delete-property/dma-names;
6021bf81340SEtienne Carriere	status = "disabled";
6031bf81340SEtienne Carriere	pwm {
6041bf81340SEtienne Carriere		pinctrl-0 = <&pwm3_pins_a>;
6051bf81340SEtienne Carriere		pinctrl-1 = <&pwm3_sleep_pins_a>;
6061bf81340SEtienne Carriere		pinctrl-names = "default", "sleep";
6071bf81340SEtienne Carriere		status = "okay";
6081bf81340SEtienne Carriere	};
6091bf81340SEtienne Carriere	timer@2 {
6101bf81340SEtienne Carriere		status = "okay";
6111bf81340SEtienne Carriere	};
6121bf81340SEtienne Carriere};
6131bf81340SEtienne Carriere
6141bf81340SEtienne Carriere&timers4 {
6151bf81340SEtienne Carriere	/delete-property/dmas;
6161bf81340SEtienne Carriere	/delete-property/dma-names;
6171bf81340SEtienne Carriere	status = "disabled";
6181bf81340SEtienne Carriere	pwm {
6191bf81340SEtienne Carriere		pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
6201bf81340SEtienne Carriere		pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
6211bf81340SEtienne Carriere		pinctrl-names = "default", "sleep";
6221bf81340SEtienne Carriere		status = "okay";
6231bf81340SEtienne Carriere	};
6241bf81340SEtienne Carriere	timer@3 {
6251bf81340SEtienne Carriere		status = "okay";
6261bf81340SEtienne Carriere	};
6271bf81340SEtienne Carriere};
6281bf81340SEtienne Carriere
6291bf81340SEtienne Carriere&timers5 {
6301bf81340SEtienne Carriere	/delete-property/dmas;
6311bf81340SEtienne Carriere	/delete-property/dma-names;
6321bf81340SEtienne Carriere	status = "disabled";
6331bf81340SEtienne Carriere	pwm {
6341bf81340SEtienne Carriere		pinctrl-0 = <&pwm5_pins_a>;
6351bf81340SEtienne Carriere		pinctrl-1 = <&pwm5_sleep_pins_a>;
6361bf81340SEtienne Carriere		pinctrl-names = "default", "sleep";
6371bf81340SEtienne Carriere		status = "okay";
6381bf81340SEtienne Carriere	};
6391bf81340SEtienne Carriere	timer@4 {
6401bf81340SEtienne Carriere		status = "okay";
6411bf81340SEtienne Carriere	};
6421bf81340SEtienne Carriere};
6431bf81340SEtienne Carriere
6441bf81340SEtienne Carriere&timers6 {
6451bf81340SEtienne Carriere	/delete-property/dmas;
6461bf81340SEtienne Carriere	/delete-property/dma-names;
6471bf81340SEtienne Carriere	status = "disabled";
6481bf81340SEtienne Carriere	timer@5 {
6491bf81340SEtienne Carriere		status = "okay";
6501bf81340SEtienne Carriere	};
6511bf81340SEtienne Carriere};
6521bf81340SEtienne Carriere
6531bf81340SEtienne Carriere&timers12 {
6541bf81340SEtienne Carriere	/delete-property/dmas;
6551bf81340SEtienne Carriere	/delete-property/dma-names;
6561bf81340SEtienne Carriere	status = "disabled";
6571bf81340SEtienne Carriere	pwm {
6581bf81340SEtienne Carriere		pinctrl-0 = <&pwm12_pins_a>;
6591bf81340SEtienne Carriere		pinctrl-1 = <&pwm12_sleep_pins_a>;
6601bf81340SEtienne Carriere		pinctrl-names = "default", "sleep";
6611bf81340SEtienne Carriere		status = "okay";
6621bf81340SEtienne Carriere	};
6631bf81340SEtienne Carriere	timer@11 {
6641bf81340SEtienne Carriere		status = "okay";
6651bf81340SEtienne Carriere	};
6661bf81340SEtienne Carriere};
6671bf81340SEtienne Carriere
6681bf81340SEtienne Carriere&uart4 {
66913bd79f4SJohann Neuhauser	pinctrl-names = "default", "sleep", "idle";
6701bf81340SEtienne Carriere	pinctrl-0 = <&uart4_pins_a>;
67113bd79f4SJohann Neuhauser	pinctrl-1 = <&uart4_sleep_pins_a>;
67213bd79f4SJohann Neuhauser	pinctrl-2 = <&uart4_idle_pins_a>;
67313bd79f4SJohann Neuhauser	/delete-property/dmas;
67413bd79f4SJohann Neuhauser	/delete-property/dma-names;
6751bf81340SEtienne Carriere	status = "okay";
6761bf81340SEtienne Carriere};
6771bf81340SEtienne Carriere
67813bd79f4SJohann Neuhauser&uart7 {
67913bd79f4SJohann Neuhauser	pinctrl-names = "default", "sleep", "idle";
68013bd79f4SJohann Neuhauser	pinctrl-0 = <&uart7_pins_c>;
68113bd79f4SJohann Neuhauser	pinctrl-1 = <&uart7_sleep_pins_c>;
68213bd79f4SJohann Neuhauser	pinctrl-2 = <&uart7_idle_pins_c>;
68313bd79f4SJohann Neuhauser	/delete-property/dmas;
68413bd79f4SJohann Neuhauser	/delete-property/dma-names;
68513bd79f4SJohann Neuhauser	status = "disabled";
68613bd79f4SJohann Neuhauser};
68713bd79f4SJohann Neuhauser
68813bd79f4SJohann Neuhauser&usart3 {
68913bd79f4SJohann Neuhauser	pinctrl-names = "default", "sleep", "idle";
69013bd79f4SJohann Neuhauser	pinctrl-0 = <&usart3_pins_c>;
69113bd79f4SJohann Neuhauser	pinctrl-1 = <&usart3_sleep_pins_c>;
69213bd79f4SJohann Neuhauser	pinctrl-2 = <&usart3_idle_pins_c>;
69313bd79f4SJohann Neuhauser	uart-has-rtscts;
69413bd79f4SJohann Neuhauser	status = "disabled";
69513bd79f4SJohann Neuhauser};
69613bd79f4SJohann Neuhauser
6971bf81340SEtienne Carriere&usbh_ehci {
6981bf81340SEtienne Carriere	phys = <&usbphyc_port0>;
699e076782bSEtienne Carriere	status = "disabled";
7001bf81340SEtienne Carriere};
7011bf81340SEtienne Carriere
7021bf81340SEtienne Carriere&usbotg_hs {
7031bf81340SEtienne Carriere	phys = <&usbphyc_port1 0>;
7041bf81340SEtienne Carriere	phy-names = "usb2-phy";
70513bd79f4SJohann Neuhauser	usb-role-switch;
706e076782bSEtienne Carriere	status = "disabled";
70713bd79f4SJohann Neuhauser
70813bd79f4SJohann Neuhauser	port {
70913bd79f4SJohann Neuhauser		usbotg_hs_ep: endpoint {
71013bd79f4SJohann Neuhauser			remote-endpoint = <&con_usbotg_hs_ep>;
71113bd79f4SJohann Neuhauser		};
71213bd79f4SJohann Neuhauser	};
7131bf81340SEtienne Carriere};
7141bf81340SEtienne Carriere
7151bf81340SEtienne Carriere&usbphyc {
716e076782bSEtienne Carriere	status = "disabled";
7171bf81340SEtienne Carriere};
7181bf81340SEtienne Carriere
7191bf81340SEtienne Carriere&usbphyc_port0 {
7201bf81340SEtienne Carriere	phy-supply = <&vdd_usb>;
72113bd79f4SJohann Neuhauser	st,tune-hs-dc-level = <2>;
72213bd79f4SJohann Neuhauser	st,enable-fs-rftime-tuning;
72313bd79f4SJohann Neuhauser	st,enable-hs-rftime-reduction;
72413bd79f4SJohann Neuhauser	st,trim-hs-current = <15>;
72513bd79f4SJohann Neuhauser	st,trim-hs-impedance = <1>;
72613bd79f4SJohann Neuhauser	st,tune-squelch-level = <3>;
72713bd79f4SJohann Neuhauser	st,tune-hs-rx-offset = <2>;
72813bd79f4SJohann Neuhauser	st,no-lsfs-sc;
7291bf81340SEtienne Carriere};
7301bf81340SEtienne Carriere
7311bf81340SEtienne Carriere&usbphyc_port1 {
7321bf81340SEtienne Carriere	phy-supply = <&vdd_usb>;
73313bd79f4SJohann Neuhauser	st,tune-hs-dc-level = <2>;
73413bd79f4SJohann Neuhauser	st,enable-fs-rftime-tuning;
73513bd79f4SJohann Neuhauser	st,enable-hs-rftime-reduction;
73613bd79f4SJohann Neuhauser	st,trim-hs-current = <15>;
73713bd79f4SJohann Neuhauser	st,trim-hs-impedance = <1>;
73813bd79f4SJohann Neuhauser	st,tune-squelch-level = <3>;
73913bd79f4SJohann Neuhauser	st,tune-hs-rx-offset = <2>;
74013bd79f4SJohann Neuhauser	st,no-lsfs-sc;
7411bf81340SEtienne Carriere};
7421bf81340SEtienne Carriere
7431bf81340SEtienne Carriere&vrefbuf {
7441bf81340SEtienne Carriere	regulator-min-microvolt = <2500000>;
7451bf81340SEtienne Carriere	regulator-max-microvolt = <2500000>;
7461bf81340SEtienne Carriere	vdda-supply = <&vdd>;
747da993b15SGatien Chevallier	status = "disabled";
7481bf81340SEtienne Carriere};
749