1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2/* 3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 5 * Copyright (C) 2020 Marek Vasut <marex@denx.de> 6 * Copyright (C) 2022 DH electronics GmbH 7 */ 8 9#include "stm32mp15-pinctrl.dtsi" 10#include "stm32mp15xxac-pinctrl.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/mfd/st,stpmic1.h> 13 14/ { 15 aliases { 16 spi0 = &qspi; 17 }; 18 19 memory@c0000000 { 20 device_type = "memory"; 21 reg = <0xc0000000 0x40000000>; 22 }; 23 24 reserved-memory { 25 #address-cells = <1>; 26 #size-cells = <1>; 27 ranges; 28 29 mcuram2: mcuram2@10000000 { 30 compatible = "shared-dma-pool"; 31 reg = <0x10000000 0x40000>; 32 no-map; 33 }; 34 35 vdev0vring0: vdev0vring0@10040000 { 36 compatible = "shared-dma-pool"; 37 reg = <0x10040000 0x1000>; 38 no-map; 39 }; 40 41 vdev0vring1: vdev0vring1@10041000 { 42 compatible = "shared-dma-pool"; 43 reg = <0x10041000 0x1000>; 44 no-map; 45 }; 46 47 vdev0buffer: vdev0buffer@10042000 { 48 compatible = "shared-dma-pool"; 49 reg = <0x10042000 0x4000>; 50 no-map; 51 }; 52 53 mcuram: mcuram@30000000 { 54 compatible = "shared-dma-pool"; 55 reg = <0x30000000 0x40000>; 56 no-map; 57 }; 58 59 retram: retram@38000000 { 60 compatible = "shared-dma-pool"; 61 reg = <0x38000000 0x10000>; 62 no-map; 63 }; 64 }; 65}; 66 67&crc1 { 68 status = "okay"; 69}; 70 71&dts { 72 status = "okay"; 73}; 74 75&etzpc { 76 st,decprot = 77 <DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 78 <DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 79 <DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 80 <DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 81 <DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 82 <DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 83 <DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 84 <DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>, 85 <DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>, 86 <DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)>, 87 <DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)>, 88 <DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_NS_RW, DECPROT_LOCK)>; 89}; 90 91&i2c4 { 92 compatible = "st,stm32mp15-i2c-non-secure"; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&i2c4_pins_a>; 95 i2c-scl-rising-time-ns = <185>; 96 i2c-scl-falling-time-ns = <20>; 97 status = "okay"; 98 /delete-property/dmas; 99 /delete-property/dma-names; 100 101 pmic: stpmic@33 { 102 compatible = "st,stpmic1"; 103 reg = <0x33>; 104 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 105 interrupt-controller; 106 #interrupt-cells = <2>; 107 status = "okay"; 108 109 regulators { 110 compatible = "st,stpmic1-regulators"; 111 112 ldo1-supply = <&v3v3>; 113 ldo2-supply = <&v3v3>; 114 ldo3-supply = <&vdd_ddr>; 115 ldo5-supply = <&v3v3>; 116 ldo6-supply = <&v3v3>; 117 pwr_sw1-supply = <&bst_out>; 118 pwr_sw2-supply = <&bst_out>; 119 120 vddcore: buck1 { 121 regulator-name = "vddcore"; 122 regulator-min-microvolt = <1200000>; 123 regulator-max-microvolt = <1350000>; 124 regulator-always-on; 125 regulator-initial-mode = <0>; 126 regulator-over-current-protection; 127 }; 128 129 vdd_ddr: buck2 { 130 regulator-name = "vdd_ddr"; 131 regulator-min-microvolt = <1350000>; 132 regulator-max-microvolt = <1350000>; 133 regulator-always-on; 134 regulator-initial-mode = <0>; 135 regulator-over-current-protection; 136 }; 137 138 vdd: buck3 { 139 regulator-name = "vdd"; 140 regulator-min-microvolt = <2900000>; 141 regulator-max-microvolt = <2900000>; 142 regulator-always-on; 143 regulator-initial-mode = <0>; 144 regulator-over-current-protection; 145 }; 146 147 v3v3: buck4 { 148 regulator-name = "v3v3"; 149 regulator-min-microvolt = <3300000>; 150 regulator-max-microvolt = <3300000>; 151 regulator-always-on; 152 regulator-over-current-protection; 153 regulator-initial-mode = <0>; 154 }; 155 156 vdda: ldo1 { 157 regulator-name = "vdda"; 158 regulator-min-microvolt = <2900000>; 159 regulator-max-microvolt = <2900000>; 160 interrupts = <IT_CURLIM_LDO1 0>; 161 }; 162 163 v2v8: ldo2 { 164 regulator-name = "v2v8"; 165 regulator-min-microvolt = <2800000>; 166 regulator-max-microvolt = <2800000>; 167 interrupts = <IT_CURLIM_LDO2 0>; 168 }; 169 170 vtt_ddr: ldo3 { 171 regulator-name = "vtt_ddr"; 172 regulator-min-microvolt = <500000>; 173 regulator-max-microvolt = <750000>; 174 regulator-always-on; 175 regulator-over-current-protection; 176 }; 177 178 vdd_usb: ldo4 { 179 regulator-name = "vdd_usb"; 180 interrupts = <IT_CURLIM_LDO4 0>; 181 }; 182 183 vdd_sd: ldo5 { 184 regulator-name = "vdd_sd"; 185 regulator-min-microvolt = <2900000>; 186 regulator-max-microvolt = <2900000>; 187 interrupts = <IT_CURLIM_LDO5 0>; 188 regulator-boot-on; 189 }; 190 191 v1v8: ldo6 { 192 regulator-name = "v1v8"; 193 regulator-min-microvolt = <1800000>; 194 regulator-max-microvolt = <1800000>; 195 interrupts = <IT_CURLIM_LDO6 0>; 196 regulator-enable-ramp-delay = <300000>; 197 }; 198 199 vref_ddr: vref_ddr { 200 regulator-name = "vref_ddr"; 201 regulator-always-on; 202 }; 203 204 bst_out: boost { 205 regulator-name = "bst_out"; 206 interrupts = <IT_OCP_BOOST 0>; 207 }; 208 209 vbus_otg: pwr_sw1 { 210 regulator-name = "vbus_otg"; 211 interrupts = <IT_OCP_OTG 0>; 212 regulator-active-discharge = <1>; 213 }; 214 215 vbus_sw: pwr_sw2 { 216 regulator-name = "vbus_sw"; 217 interrupts = <IT_OCP_SWOUT 0>; 218 regulator-active-discharge = <1>; 219 }; 220 }; 221 222 onkey { 223 compatible = "st,stpmic1-onkey"; 224 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>; 225 interrupt-names = "onkey-falling", "onkey-rising"; 226 status = "okay"; 227 }; 228 229 watchdog { 230 compatible = "st,stpmic1-wdt"; 231 status = "disabled"; 232 }; 233 }; 234 235 eeprom@53 { 236 compatible = "atmel,24c02"; 237 reg = <0x53>; 238 pagesize = <16>; 239 }; 240}; 241 242&ipcc { 243 status = "okay"; 244}; 245 246&iwdg2 { 247 timeout-sec = <32>; 248 status = "okay"; 249 secure-status = "disabled"; 250}; 251 252&m4_rproc { 253 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 254 <&vdev0vring1>, <&vdev0buffer>; 255 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 256 mbox-names = "vq0", "vq1", "shutdown"; 257 interrupt-parent = <&exti>; 258 interrupts = <68 1>; 259 status = "okay"; 260}; 261 262&pwr_regulators { 263 vdd-supply = <&vdd>; 264 vdd_3v3_usbfs-supply = <&vdd_usb>; 265}; 266 267&qspi { 268 pinctrl-names = "default", "sleep"; 269 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; 270 pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; 271 reg = <0x58003000 0x1000>, <0x70000000 0x200000>; 272 #address-cells = <1>; 273 #size-cells = <0>; 274 status = "okay"; 275 276 flash0: flash@0 { 277 compatible = "jedec,spi-nor"; 278 reg = <0>; 279 spi-rx-bus-width = <4>; 280 spi-max-frequency = <50000000>; 281 #address-cells = <1>; 282 #size-cells = <1>; 283 }; 284}; 285 286&rcc { 287 status = "okay"; 288}; 289 290&rng1 { 291 status = "okay"; 292}; 293 294&rtc { 295 status = "okay"; 296}; 297