xref: /optee_os/core/arch/arm/dts/stm32mp15xx-dhcom-som.dtsi (revision 12fc37711783247b0d05fdc271ef007f4930767b)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
4 * Copyright (C) 2022 DH electronics GmbH
5 */
6
7#include "stm32mp15-pinctrl.dtsi"
8#include "stm32mp15xxaa-pinctrl.dtsi"
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/mfd/st,stpmic1.h>
11
12/ {
13	aliases {
14		ethernet0 = &ethernet0;
15		ethernet1 = &ksz8851;
16		rtc0 = &hwrtc;
17		rtc1 = &rtc;
18	};
19
20	memory@c0000000 {
21		device_type = "memory";
22		reg = <0xC0000000 0x40000000>;
23	};
24
25	reserved-memory {
26		#address-cells = <1>;
27		#size-cells = <1>;
28		ranges;
29
30		mcuram2: mcuram2@10000000 {
31			compatible = "shared-dma-pool";
32			reg = <0x10000000 0x40000>;
33			no-map;
34		};
35
36		vdev0vring0: vdev0vring0@10040000 {
37			compatible = "shared-dma-pool";
38			reg = <0x10040000 0x1000>;
39			no-map;
40		};
41
42		vdev0vring1: vdev0vring1@10041000 {
43			compatible = "shared-dma-pool";
44			reg = <0x10041000 0x1000>;
45			no-map;
46		};
47
48		vdev0buffer: vdev0buffer@10042000 {
49			compatible = "shared-dma-pool";
50			reg = <0x10042000 0x4000>;
51			no-map;
52		};
53
54		mcuram: mcuram@30000000 {
55			compatible = "shared-dma-pool";
56			reg = <0x30000000 0x40000>;
57			no-map;
58		};
59
60		retram: retram@38000000 {
61			compatible = "shared-dma-pool";
62			reg = <0x38000000 0x10000>;
63			no-map;
64		};
65	};
66
67	ethernet_vio: vioregulator {
68		compatible = "regulator-fixed";
69		regulator-name = "vio";
70		regulator-min-microvolt = <3300000>;
71		regulator-max-microvolt = <3300000>;
72		gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
73		regulator-always-on;
74		regulator-boot-on;
75		vin-supply = <&vdd>;
76	};
77};
78
79&adc {
80	vdd-supply = <&vdd>;
81	vdda-supply = <&vdda>;
82	vref-supply = <&vdda>;
83	status = "okay";
84
85	adc1: adc@0 {
86		st,min-sample-time-nsecs = <5000>;
87		st,adc-channels = <0>;
88		status = "okay";
89	};
90
91	adc2: adc@100 {
92		st,adc-channels = <1>;
93		st,min-sample-time-nsecs = <5000>;
94		status = "okay";
95	};
96};
97
98&crc1 {
99	status = "okay";
100};
101
102&dac {
103	pinctrl-names = "default";
104	pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
105	vref-supply = <&vdda>;
106	status = "okay";
107
108	dac1: dac@1 {
109		status = "okay";
110	};
111	dac2: dac@2 {
112		status = "okay";
113	};
114};
115
116&dts {
117	status = "okay";
118};
119
120&ethernet0 {
121	status = "okay";
122	pinctrl-0 = <&ethernet0_rmii_pins_c &mco2_pins_a>;
123	pinctrl-1 = <&ethernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>;
124	pinctrl-names = "default", "sleep";
125	phy-mode = "rmii";
126	max-speed = <100>;
127	phy-handle = <&phy0>;
128
129	mdio0 {
130		#address-cells = <1>;
131		#size-cells = <0>;
132		compatible = "snps,dwmac-mdio";
133
134		phy0: ethernet-phy@1 {
135			reg = <1>;
136			/* LAN8710Ai */
137			compatible = "ethernet-phy-id0007.c0f0",
138				     "ethernet-phy-ieee802.3-c22";
139			clocks = <&rcc CK_MCO2>;
140			reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
141			reset-assert-us = <500>;
142			reset-deassert-us = <500>;
143			smsc,disable-energy-detect;
144			interrupt-parent = <&gpioi>;
145			interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
146		};
147	};
148};
149
150&fmc {
151	pinctrl-names = "default", "sleep";
152	pinctrl-0 = <&fmc_pins_b>;
153	pinctrl-1 = <&fmc_sleep_pins_b>;
154	status = "okay";
155
156	ksz8851: ethernet@1,0 {
157		compatible = "micrel,ks8851-mll";
158		reg = <1 0x0 0x2>, <1 0x2 0x20000>;
159		interrupt-parent = <&gpioc>;
160		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
161		bank-width = <2>;
162
163		/* Timing values are in nS */
164		st,fmc2-ebi-cs-mux-enable;
165		st,fmc2-ebi-cs-transaction-type = <4>;
166		st,fmc2-ebi-cs-buswidth = <16>;
167		st,fmc2-ebi-cs-address-setup-ns = <5>;
168		st,fmc2-ebi-cs-address-hold-ns = <5>;
169		st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
170		st,fmc2-ebi-cs-data-setup-ns = <45>;
171		st,fmc2-ebi-cs-data-hold-ns = <1>;
172		st,fmc2-ebi-cs-write-address-setup-ns = <5>;
173		st,fmc2-ebi-cs-write-address-hold-ns = <5>;
174		st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
175		st,fmc2-ebi-cs-write-data-setup-ns = <45>;
176		st,fmc2-ebi-cs-write-data-hold-ns = <1>;
177	};
178};
179
180&gpioa {
181	gpio-line-names = "", "", "", "",
182			  "", "", "DHCOM-K", "",
183			  "", "", "", "",
184			  "", "", "", "";
185};
186
187&gpiob {
188	gpio-line-names = "", "", "", "",
189			  "", "", "", "",
190			  "DHCOM-Q", "", "", "",
191			  "", "", "", "";
192};
193
194&gpioc {
195	gpio-line-names = "", "", "", "",
196			  "", "", "DHCOM-E", "",
197			  "", "", "", "",
198			  "", "", "", "";
199};
200
201&gpiod {
202	gpio-line-names = "", "", "", "",
203			  "", "", "DHCOM-B", "",
204			  "", "", "", "DHCOM-F",
205			  "DHCOM-D", "", "", "";
206};
207
208&gpioe {
209	gpio-line-names = "", "", "", "",
210			  "", "", "DHCOM-P", "",
211			  "", "", "", "",
212			  "", "", "", "";
213};
214
215&gpiof {
216	gpio-line-names = "", "", "", "DHCOM-A",
217			  "", "", "", "",
218			  "", "", "", "",
219			  "", "", "", "";
220};
221
222&gpiog {
223	gpio-line-names = "DHCOM-C", "", "", "",
224			  "", "", "", "",
225			  "DHCOM-L", "", "", "",
226			  "", "", "", "";
227};
228
229&gpioh {
230	gpio-line-names = "", "", "", "",
231			  "", "", "", "DHCOM-N",
232			  "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
233			  "DHCOM-T", "", "DHCOM-S", "";
234};
235
236&gpioi {
237	gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
238			  "DHCOM-R", "DHCOM-M", "", "",
239			  "", "", "", "",
240			  "", "", "", "";
241};
242
243&i2c4 {
244	pinctrl-names = "default";
245	pinctrl-0 = <&i2c4_pins_a>;
246	i2c-scl-rising-time-ns = <185>;
247	i2c-scl-falling-time-ns = <20>;
248	status = "okay";
249	/* spare dmas for other usage */
250	/delete-property/dmas;
251	/delete-property/dma-names;
252
253	hwrtc: rtc@32 {
254		compatible = "microcrystal,rv8803";
255		reg = <0x32>;
256	};
257
258	pmic: stpmic@33 {
259		compatible = "st,stpmic1";
260		reg = <0x33>;
261		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
262		interrupt-controller;
263		#interrupt-cells = <2>;
264		status = "okay";
265
266		regulators {
267			compatible = "st,stpmic1-regulators";
268			ldo1-supply = <&v3v3>;
269			ldo2-supply = <&v3v3>;
270			ldo3-supply = <&vdd_ddr>;
271			ldo5-supply = <&v3v3>;
272			ldo6-supply = <&v3v3>;
273			pwr_sw1-supply = <&bst_out>;
274			pwr_sw2-supply = <&bst_out>;
275
276			vddcore: buck1 {
277				regulator-name = "vddcore";
278				regulator-min-microvolt = <800000>;
279				regulator-max-microvolt = <1350000>;
280				regulator-always-on;
281				regulator-initial-mode = <0>;
282				regulator-over-current-protection;
283			};
284
285			vdd_ddr: buck2 {
286				regulator-name = "vdd_ddr";
287				regulator-min-microvolt = <1350000>;
288				regulator-max-microvolt = <1350000>;
289				regulator-always-on;
290				regulator-initial-mode = <0>;
291				regulator-over-current-protection;
292			};
293
294			vdd: buck3 {
295				regulator-name = "vdd";
296				regulator-min-microvolt = <3300000>;
297				regulator-max-microvolt = <3300000>;
298				regulator-always-on;
299				st,mask-reset;
300				regulator-initial-mode = <0>;
301				regulator-over-current-protection;
302			};
303
304			v3v3: buck4 {
305				regulator-name = "v3v3";
306				regulator-min-microvolt = <3300000>;
307				regulator-max-microvolt = <3300000>;
308				regulator-always-on;
309				regulator-over-current-protection;
310				regulator-initial-mode = <0>;
311			};
312
313			vdda: ldo1 {
314				regulator-name = "vdda";
315				regulator-always-on;
316				regulator-min-microvolt = <2900000>;
317				regulator-max-microvolt = <2900000>;
318				interrupts = <IT_CURLIM_LDO1 0>;
319			};
320
321			v2v8: ldo2 {
322				regulator-name = "v2v8";
323				regulator-min-microvolt = <2800000>;
324				regulator-max-microvolt = <2800000>;
325				interrupts = <IT_CURLIM_LDO2 0>;
326			};
327
328			vtt_ddr: ldo3 {
329				regulator-name = "vtt_ddr";
330				regulator-min-microvolt = <500000>;
331				regulator-max-microvolt = <750000>;
332				regulator-always-on;
333				regulator-over-current-protection;
334			};
335
336			vdd_usb: ldo4 {
337				regulator-name = "vdd_usb";
338				interrupts = <IT_CURLIM_LDO4 0>;
339			};
340
341			vdd_sd: ldo5 {
342				regulator-name = "vdd_sd";
343				regulator-min-microvolt = <2900000>;
344				regulator-max-microvolt = <2900000>;
345				interrupts = <IT_CURLIM_LDO5 0>;
346				regulator-boot-on;
347			};
348
349			v1v8: ldo6 {
350				regulator-name = "v1v8";
351				regulator-min-microvolt = <1800000>;
352				regulator-max-microvolt = <1800000>;
353				interrupts = <IT_CURLIM_LDO6 0>;
354			};
355
356			vref_ddr: vref_ddr {
357				regulator-name = "vref_ddr";
358				regulator-always-on;
359			};
360
361			bst_out: boost {
362				regulator-name = "bst_out";
363				interrupts = <IT_OCP_BOOST 0>;
364			};
365
366			vbus_otg: pwr_sw1 {
367				regulator-name = "vbus_otg";
368				interrupts = <IT_OCP_OTG 0>;
369			};
370
371			vbus_sw: pwr_sw2 {
372				regulator-name = "vbus_sw";
373				interrupts = <IT_OCP_SWOUT 0>;
374				regulator-active-discharge = <1>;
375			};
376		};
377
378		onkey {
379			compatible = "st,stpmic1-onkey";
380			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
381			interrupt-names = "onkey-falling", "onkey-rising";
382			power-off-time-sec = <10>;
383			status = "okay";
384		};
385
386		watchdog {
387			compatible = "st,stpmic1-wdt";
388			status = "disabled";
389		};
390	};
391
392	touchscreen@49 {
393		compatible = "ti,tsc2004";
394		reg = <0x49>;
395		vio-supply = <&v3v3>;
396		interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
397	};
398
399	eeprom@50 {
400		compatible = "atmel,24c02";
401		reg = <0x50>;
402		pagesize = <16>;
403	};
404};
405
406&ipcc {
407	status = "okay";
408};
409
410&iwdg2 {
411	timeout-sec = <32>;
412	status = "okay";
413	secure-status = "disabled";
414};
415
416&m4_rproc {
417	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
418			<&vdev0vring1>, <&vdev0buffer>;
419	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
420	mbox-names = "vq0", "vq1", "shutdown";
421	interrupt-parent = <&exti>;
422	interrupts = <68 1>;
423	status = "okay";
424};
425
426&pwr_regulators {
427	vdd-supply = <&vdd>;
428	vdd_3v3_usbfs-supply = <&vdd_usb>;
429};
430
431&qspi {
432	pinctrl-names = "default", "sleep";
433	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
434	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
435	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
436	#address-cells = <1>;
437	#size-cells = <0>;
438	status = "okay";
439
440	flash0: flash@0 {
441		compatible = "jedec,spi-nor";
442		reg = <0>;
443		spi-rx-bus-width = <4>;
444		spi-max-frequency = <108000000>;
445		#address-cells = <1>;
446		#size-cells = <1>;
447	};
448};
449
450&rcc {
451	/* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */
452	/* clocks = <&rcc CK_MCO2>; Not supported in OP-TEE OS */
453	/* clock-names = "ETH_RX_CLK/ETH_REF_CLK"; Not supported */
454
455	/*
456	 * Set PLL4P output to 100 MHz to supply SDMMC with faster clock,
457	 * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
458	 * so that MCO2 behaves as a divider for the ETHRX clock here.
459	 */
460	/* assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>; Not supported */
461	/* assigned-clock-parents = <&rcc PLL4_P>; Not supported */
462	/* assigned-clock-rates = <50000000>, <100000000>; Not supported */
463
464	status = "okay";
465};
466
467&rng1 {
468	status = "okay";
469};
470
471&rtc {
472	status = "okay";
473};
474
475&sdmmc1 {
476	pinctrl-names = "default", "opendrain", "sleep", "init";
477	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
478	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
479	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
480	pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
481	cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
482	disable-wp;
483	st,sig-dir;
484	st,neg-edge;
485	st,use-ckin;
486	st,cmd-gpios = <&gpiod 2 0>;
487	st,ck-gpios = <&gpioc 12 0>;
488	st,ckin-gpios = <&gpioe 4 0>;
489	bus-width = <4>;
490	vmmc-supply = <&vdd_sd>;
491	status = "okay";
492};
493
494&sdmmc1_b4_pins_a {
495	/*
496	 * SD bus pull-up resistors:
497	 * - optional on SoMs with SD voltage translator
498	 * - mandatory on SoMs without SD voltage translator
499	 */
500	pins1 {
501		bias-pull-up;
502	};
503	pins2 {
504		bias-pull-up;
505	};
506};
507
508&sdmmc2 {
509	pinctrl-names = "default", "opendrain", "sleep";
510	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
511	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
512	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
513	non-removable;
514	no-sd;
515	no-sdio;
516	st,neg-edge;
517	bus-width = <8>;
518	vmmc-supply = <&v3v3>;
519	vqmmc-supply = <&v3v3>;
520	mmc-ddr-3_3v;
521	status = "okay";
522};
523
524&sdmmc3 {
525	pinctrl-names = "default", "opendrain", "sleep";
526	pinctrl-0 = <&sdmmc3_b4_pins_a>;
527	pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
528	pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
529	broken-cd;
530	st,neg-edge;
531	bus-width = <4>;
532	vmmc-supply = <&v3v3>;
533	vqmmc-supply = <&v3v3>;
534	mmc-ddr-3_3v;
535	status = "okay";
536};
537
538&uart4 {
539	pinctrl-names = "default";
540	pinctrl-0 = <&uart4_pins_a>;
541	/delete-property/dmas;
542	/delete-property/dma-names;
543	status = "okay";
544};
545