112941fdcSEtienne Carriere// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 212941fdcSEtienne Carriere/* 341115447SGatien Chevallier * Copyright (C) STMicroelectronics 2017-2024 - All Rights Reserved 412941fdcSEtienne Carriere * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. 512941fdcSEtienne Carriere */ 612941fdcSEtienne Carriere/dts-v1/; 712941fdcSEtienne Carriere 81bf81340SEtienne Carriere#include "stm32mp157.dtsi" 91bf81340SEtienne Carriere#include "stm32mp15xc.dtsi" 101bf81340SEtienne Carriere#include "stm32mp15-pinctrl.dtsi" 111bf81340SEtienne Carriere#include "stm32mp15xxaa-pinctrl.dtsi" 121183a0aaSEtienne Carriere#include <dt-bindings/gpio/gpio.h> 131183a0aaSEtienne Carriere#include <dt-bindings/mfd/st,stpmic1.h> 1412941fdcSEtienne Carriere 1512941fdcSEtienne Carriere/ { 1612941fdcSEtienne Carriere model = "STMicroelectronics STM32MP157C eval daughter"; 1712941fdcSEtienne Carriere compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 1812941fdcSEtienne Carriere 1912941fdcSEtienne Carriere chosen { 2012941fdcSEtienne Carriere stdout-path = "serial0:115200n8"; 2112941fdcSEtienne Carriere }; 2212941fdcSEtienne Carriere 2312941fdcSEtienne Carriere memory@c0000000 { 241183a0aaSEtienne Carriere device_type = "memory"; 2512941fdcSEtienne Carriere reg = <0xC0000000 0x40000000>; 2612941fdcSEtienne Carriere }; 2712941fdcSEtienne Carriere 281bf81340SEtienne Carriere reserved-memory { 291bf81340SEtienne Carriere #address-cells = <1>; 301bf81340SEtienne Carriere #size-cells = <1>; 311bf81340SEtienne Carriere ranges; 321bf81340SEtienne Carriere 331bf81340SEtienne Carriere mcuram2: mcuram2@10000000 { 341bf81340SEtienne Carriere compatible = "shared-dma-pool"; 351bf81340SEtienne Carriere reg = <0x10000000 0x40000>; 361bf81340SEtienne Carriere no-map; 371bf81340SEtienne Carriere }; 381bf81340SEtienne Carriere 391bf81340SEtienne Carriere vdev0vring0: vdev0vring0@10040000 { 401bf81340SEtienne Carriere compatible = "shared-dma-pool"; 411bf81340SEtienne Carriere reg = <0x10040000 0x1000>; 421bf81340SEtienne Carriere no-map; 431bf81340SEtienne Carriere }; 441bf81340SEtienne Carriere 451bf81340SEtienne Carriere vdev0vring1: vdev0vring1@10041000 { 461bf81340SEtienne Carriere compatible = "shared-dma-pool"; 471bf81340SEtienne Carriere reg = <0x10041000 0x1000>; 481bf81340SEtienne Carriere no-map; 491bf81340SEtienne Carriere }; 501bf81340SEtienne Carriere 511bf81340SEtienne Carriere vdev0buffer: vdev0buffer@10042000 { 521bf81340SEtienne Carriere compatible = "shared-dma-pool"; 531bf81340SEtienne Carriere reg = <0x10042000 0x4000>; 541bf81340SEtienne Carriere no-map; 551bf81340SEtienne Carriere }; 561bf81340SEtienne Carriere 577c9920cbSArnaud Pouliquen ipc_shmem: ipc-shmem@1004f000 { 587c9920cbSArnaud Pouliquen compatible = "shared-dma-pool"; 597c9920cbSArnaud Pouliquen reg = <0x10048000 0x8000>; 607c9920cbSArnaud Pouliquen no-map; 617c9920cbSArnaud Pouliquen }; 627c9920cbSArnaud Pouliquen 631bf81340SEtienne Carriere mcuram: mcuram@30000000 { 641bf81340SEtienne Carriere compatible = "shared-dma-pool"; 651bf81340SEtienne Carriere reg = <0x30000000 0x40000>; 661bf81340SEtienne Carriere no-map; 671bf81340SEtienne Carriere }; 681bf81340SEtienne Carriere 691bf81340SEtienne Carriere retram: retram@38000000 { 701bf81340SEtienne Carriere compatible = "shared-dma-pool"; 711bf81340SEtienne Carriere reg = <0x38000000 0x10000>; 721bf81340SEtienne Carriere no-map; 731bf81340SEtienne Carriere }; 741bf81340SEtienne Carriere 751bf81340SEtienne Carriere gpu_reserved: gpu@e8000000 { 761bf81340SEtienne Carriere reg = <0xe8000000 0x8000000>; 771bf81340SEtienne Carriere no-map; 781bf81340SEtienne Carriere }; 791bf81340SEtienne Carriere }; 801bf81340SEtienne Carriere 8112941fdcSEtienne Carriere aliases { 8212941fdcSEtienne Carriere serial0 = &uart4; 8312941fdcSEtienne Carriere }; 8412941fdcSEtienne Carriere 851183a0aaSEtienne Carriere sd_switch: regulator-sd_switch { 861183a0aaSEtienne Carriere compatible = "regulator-gpio"; 871183a0aaSEtienne Carriere regulator-name = "sd_switch"; 881183a0aaSEtienne Carriere regulator-min-microvolt = <1800000>; 891183a0aaSEtienne Carriere regulator-max-microvolt = <2900000>; 901183a0aaSEtienne Carriere regulator-type = "voltage"; 9112941fdcSEtienne Carriere regulator-always-on; 921183a0aaSEtienne Carriere 931183a0aaSEtienne Carriere gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; 941183a0aaSEtienne Carriere gpios-states = <0>; 951bf81340SEtienne Carriere states = <1800000 0x1>, 961bf81340SEtienne Carriere <2900000 0x0>; 97*c1e499aeSEtienne Carriere status = "disabled"; 981bf81340SEtienne Carriere }; 9913bd79f4SJohann Neuhauser 10013bd79f4SJohann Neuhauser vin: vin { 10113bd79f4SJohann Neuhauser compatible = "regulator-fixed"; 10213bd79f4SJohann Neuhauser regulator-name = "vin"; 10313bd79f4SJohann Neuhauser regulator-min-microvolt = <5000000>; 10413bd79f4SJohann Neuhauser regulator-max-microvolt = <5000000>; 10513bd79f4SJohann Neuhauser regulator-always-on; 10613bd79f4SJohann Neuhauser }; 1071bf81340SEtienne Carriere}; 1081bf81340SEtienne Carriere 1091bf81340SEtienne Carriere&adc { 1101bf81340SEtienne Carriere /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */ 1111bf81340SEtienne Carriere pinctrl-0 = <&adc1_in6_pins_a>; 1121bf81340SEtienne Carriere pinctrl-names = "default"; 1131bf81340SEtienne Carriere vdd-supply = <&vdd>; 1141bf81340SEtienne Carriere vdda-supply = <&vdda>; 1151bf81340SEtienne Carriere vref-supply = <&vdda>; 1161bf81340SEtienne Carriere status = "disabled"; 1171bf81340SEtienne Carriere adc1: adc@0 { 1181bf81340SEtienne Carriere st,adc-channels = <0 1 6>; 1191bf81340SEtienne Carriere /* 16.5 ck_cycles sampling time */ 1201bf81340SEtienne Carriere st,min-sample-time-nsecs = <400>; 1211bf81340SEtienne Carriere status = "okay"; 1221bf81340SEtienne Carriere }; 1231bf81340SEtienne Carriere}; 1241bf81340SEtienne Carriere 1259446de32SEtienne Carriere&bsec { 1269446de32SEtienne Carriere board_id: board_id@ec { 1279446de32SEtienne Carriere reg = <0xec 0x4>; 1289446de32SEtienne Carriere st,non-secure-otp; 1299446de32SEtienne Carriere }; 1307723564bSNicolas Toromanoff huk_otp: huk-otp@f0 { 1317723564bSNicolas Toromanoff reg = <0xf0 0x10>; 1327723564bSNicolas Toromanoff }; 1339446de32SEtienne Carriere}; 1349446de32SEtienne Carriere 13513bd79f4SJohann Neuhauser&crc1 { 136e076782bSEtienne Carriere status = "disabled"; 13713bd79f4SJohann Neuhauser}; 13813bd79f4SJohann Neuhauser 1391bf81340SEtienne Carriere&dac { 1401bf81340SEtienne Carriere pinctrl-names = "default"; 1411bf81340SEtienne Carriere pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; 1421bf81340SEtienne Carriere vref-supply = <&vdda>; 1431bf81340SEtienne Carriere status = "disabled"; 1441bf81340SEtienne Carriere dac1: dac@1 { 1451bf81340SEtienne Carriere status = "okay"; 1461bf81340SEtienne Carriere }; 1471bf81340SEtienne Carriere dac2: dac@2 { 1481bf81340SEtienne Carriere status = "okay"; 14912941fdcSEtienne Carriere }; 15012941fdcSEtienne Carriere}; 15112941fdcSEtienne Carriere 1521183a0aaSEtienne Carriere&dts { 153e076782bSEtienne Carriere status = "disabled"; 1541183a0aaSEtienne Carriere}; 1551183a0aaSEtienne Carriere 15641115447SGatien Chevallier&etzpc { 15741115447SGatien Chevallier st,decprot = 15841115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 15941115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 16041115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 16141115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 16241115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 16341115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 16441115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>, 16541115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>, 16641115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>, 16741115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)>, 16841115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)>, 16941115447SGatien Chevallier <DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK)>; 17041115447SGatien Chevallier}; 17141115447SGatien Chevallier 1721bf81340SEtienne Carriere&gpu { 1731bf81340SEtienne Carriere contiguous-area = <&gpu_reserved>; 17413bd79f4SJohann Neuhauser}; 17513bd79f4SJohann Neuhauser 17613bd79f4SJohann Neuhauser&hash1 { 177e076782bSEtienne Carriere status = "disabled"; 1781bf81340SEtienne Carriere}; 1791bf81340SEtienne Carriere 18012941fdcSEtienne Carriere&i2c4 { 18123df205fSGatien Chevallier compatible = "st,stm32mp15-i2c-non-secure"; 18213bd79f4SJohann Neuhauser pinctrl-names = "default", "sleep"; 18312941fdcSEtienne Carriere pinctrl-0 = <&i2c4_pins_a>; 18413bd79f4SJohann Neuhauser pinctrl-1 = <&i2c4_sleep_pins_a>; 18512941fdcSEtienne Carriere i2c-scl-rising-time-ns = <185>; 18612941fdcSEtienne Carriere i2c-scl-falling-time-ns = <20>; 18713bd79f4SJohann Neuhauser clock-frequency = <400000>; 18812941fdcSEtienne Carriere status = "okay"; 1891183a0aaSEtienne Carriere /* spare dmas for other usage */ 1901183a0aaSEtienne Carriere /delete-property/dmas; 1911183a0aaSEtienne Carriere /delete-property/dma-names; 1921183a0aaSEtienne Carriere 1931183a0aaSEtienne Carriere pmic: stpmic@33 { 1941183a0aaSEtienne Carriere compatible = "st,stpmic1"; 1951183a0aaSEtienne Carriere reg = <0x33>; 1961183a0aaSEtienne Carriere interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 1971183a0aaSEtienne Carriere interrupt-controller; 1981183a0aaSEtienne Carriere #interrupt-cells = <2>; 1991183a0aaSEtienne Carriere status = "okay"; 2001183a0aaSEtienne Carriere 2011183a0aaSEtienne Carriere regulators { 2021183a0aaSEtienne Carriere compatible = "st,stpmic1-regulators"; 20313bd79f4SJohann Neuhauser buck1-supply = <&vin>; 20413bd79f4SJohann Neuhauser buck2-supply = <&vin>; 20513bd79f4SJohann Neuhauser buck3-supply = <&vin>; 20613bd79f4SJohann Neuhauser buck4-supply = <&vin>; 2071183a0aaSEtienne Carriere ldo1-supply = <&v3v3>; 2081183a0aaSEtienne Carriere ldo2-supply = <&v3v3>; 2091183a0aaSEtienne Carriere ldo3-supply = <&vdd_ddr>; 21013bd79f4SJohann Neuhauser ldo4-supply = <&vin>; 2111183a0aaSEtienne Carriere ldo5-supply = <&v3v3>; 2121183a0aaSEtienne Carriere ldo6-supply = <&v3v3>; 21313bd79f4SJohann Neuhauser vref_ddr-supply = <&vin>; 21413bd79f4SJohann Neuhauser boost-supply = <&vin>; 2151183a0aaSEtienne Carriere pwr_sw1-supply = <&bst_out>; 2161183a0aaSEtienne Carriere pwr_sw2-supply = <&bst_out>; 2171183a0aaSEtienne Carriere 2181183a0aaSEtienne Carriere vddcore: buck1 { 2191183a0aaSEtienne Carriere regulator-name = "vddcore"; 2201bf81340SEtienne Carriere regulator-min-microvolt = <1200000>; 2211183a0aaSEtienne Carriere regulator-max-microvolt = <1350000>; 2221183a0aaSEtienne Carriere regulator-always-on; 2231183a0aaSEtienne Carriere regulator-initial-mode = <0>; 2241183a0aaSEtienne Carriere regulator-over-current-protection; 2251183a0aaSEtienne Carriere }; 2261183a0aaSEtienne Carriere 2271183a0aaSEtienne Carriere vdd_ddr: buck2 { 2281183a0aaSEtienne Carriere regulator-name = "vdd_ddr"; 2291183a0aaSEtienne Carriere regulator-min-microvolt = <1350000>; 2301183a0aaSEtienne Carriere regulator-max-microvolt = <1350000>; 2311183a0aaSEtienne Carriere regulator-always-on; 2321183a0aaSEtienne Carriere regulator-initial-mode = <0>; 2331183a0aaSEtienne Carriere regulator-over-current-protection; 2341183a0aaSEtienne Carriere }; 2351183a0aaSEtienne Carriere 2361183a0aaSEtienne Carriere vdd: buck3 { 2371183a0aaSEtienne Carriere regulator-name = "vdd"; 2381183a0aaSEtienne Carriere regulator-min-microvolt = <3300000>; 2391183a0aaSEtienne Carriere regulator-max-microvolt = <3300000>; 2401183a0aaSEtienne Carriere regulator-always-on; 2411183a0aaSEtienne Carriere st,mask-reset; 2421183a0aaSEtienne Carriere regulator-initial-mode = <0>; 2431183a0aaSEtienne Carriere regulator-over-current-protection; 2441183a0aaSEtienne Carriere }; 2451183a0aaSEtienne Carriere 2461183a0aaSEtienne Carriere v3v3: buck4 { 2471183a0aaSEtienne Carriere regulator-name = "v3v3"; 2481183a0aaSEtienne Carriere regulator-min-microvolt = <3300000>; 2491183a0aaSEtienne Carriere regulator-max-microvolt = <3300000>; 2501183a0aaSEtienne Carriere regulator-always-on; 2511183a0aaSEtienne Carriere regulator-over-current-protection; 2521183a0aaSEtienne Carriere regulator-initial-mode = <0>; 2531183a0aaSEtienne Carriere }; 2541183a0aaSEtienne Carriere 2551183a0aaSEtienne Carriere vdda: ldo1 { 2561183a0aaSEtienne Carriere regulator-name = "vdda"; 2571183a0aaSEtienne Carriere regulator-min-microvolt = <2900000>; 2581183a0aaSEtienne Carriere regulator-max-microvolt = <2900000>; 2591183a0aaSEtienne Carriere interrupts = <IT_CURLIM_LDO1 0>; 2601183a0aaSEtienne Carriere }; 2611183a0aaSEtienne Carriere 2621183a0aaSEtienne Carriere v2v8: ldo2 { 2631183a0aaSEtienne Carriere regulator-name = "v2v8"; 2641183a0aaSEtienne Carriere regulator-min-microvolt = <2800000>; 2651183a0aaSEtienne Carriere regulator-max-microvolt = <2800000>; 2661183a0aaSEtienne Carriere interrupts = <IT_CURLIM_LDO2 0>; 2671183a0aaSEtienne Carriere }; 2681183a0aaSEtienne Carriere 2691183a0aaSEtienne Carriere vtt_ddr: ldo3 { 2701183a0aaSEtienne Carriere regulator-name = "vtt_ddr"; 2711183a0aaSEtienne Carriere regulator-min-microvolt = <500000>; 2721183a0aaSEtienne Carriere regulator-max-microvolt = <750000>; 2731183a0aaSEtienne Carriere regulator-always-on; 2741183a0aaSEtienne Carriere regulator-over-current-protection; 2751183a0aaSEtienne Carriere }; 2761183a0aaSEtienne Carriere 2771183a0aaSEtienne Carriere vdd_usb: ldo4 { 2781183a0aaSEtienne Carriere regulator-name = "vdd_usb"; 2791183a0aaSEtienne Carriere interrupts = <IT_CURLIM_LDO4 0>; 28088747678SEtienne Carriere regulator-always-on; 2811183a0aaSEtienne Carriere }; 2821183a0aaSEtienne Carriere 2831183a0aaSEtienne Carriere vdd_sd: ldo5 { 2841183a0aaSEtienne Carriere regulator-name = "vdd_sd"; 2851183a0aaSEtienne Carriere regulator-min-microvolt = <2900000>; 2861183a0aaSEtienne Carriere regulator-max-microvolt = <2900000>; 2871183a0aaSEtienne Carriere interrupts = <IT_CURLIM_LDO5 0>; 2881183a0aaSEtienne Carriere regulator-boot-on; 2891183a0aaSEtienne Carriere }; 2901183a0aaSEtienne Carriere 2911183a0aaSEtienne Carriere v1v8: ldo6 { 2921183a0aaSEtienne Carriere regulator-name = "v1v8"; 2931183a0aaSEtienne Carriere regulator-min-microvolt = <1800000>; 2941183a0aaSEtienne Carriere regulator-max-microvolt = <1800000>; 2951183a0aaSEtienne Carriere interrupts = <IT_CURLIM_LDO6 0>; 2961183a0aaSEtienne Carriere }; 2971183a0aaSEtienne Carriere 2981183a0aaSEtienne Carriere vref_ddr: vref_ddr { 2991183a0aaSEtienne Carriere regulator-name = "vref_ddr"; 3001183a0aaSEtienne Carriere regulator-always-on; 3011183a0aaSEtienne Carriere }; 3021183a0aaSEtienne Carriere 3031183a0aaSEtienne Carriere bst_out: boost { 3041183a0aaSEtienne Carriere regulator-name = "bst_out"; 3051183a0aaSEtienne Carriere interrupts = <IT_OCP_BOOST 0>; 3061183a0aaSEtienne Carriere }; 3071183a0aaSEtienne Carriere 3081183a0aaSEtienne Carriere vbus_otg: pwr_sw1 { 3091183a0aaSEtienne Carriere regulator-name = "vbus_otg"; 3101183a0aaSEtienne Carriere interrupts = <IT_OCP_OTG 0>; 3111183a0aaSEtienne Carriere }; 3121183a0aaSEtienne Carriere 3131183a0aaSEtienne Carriere vbus_sw: pwr_sw2 { 3141183a0aaSEtienne Carriere regulator-name = "vbus_sw"; 3151183a0aaSEtienne Carriere interrupts = <IT_OCP_SWOUT 0>; 3161bf81340SEtienne Carriere regulator-active-discharge = <1>; 3171183a0aaSEtienne Carriere }; 3181183a0aaSEtienne Carriere }; 3191183a0aaSEtienne Carriere 3201183a0aaSEtienne Carriere onkey { 3211183a0aaSEtienne Carriere compatible = "st,stpmic1-onkey"; 3221183a0aaSEtienne Carriere interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; 3231183a0aaSEtienne Carriere interrupt-names = "onkey-falling", "onkey-rising"; 3241183a0aaSEtienne Carriere power-off-time-sec = <10>; 325e076782bSEtienne Carriere status = "disabled"; 3261183a0aaSEtienne Carriere }; 3271183a0aaSEtienne Carriere 3281183a0aaSEtienne Carriere watchdog { 3291183a0aaSEtienne Carriere compatible = "st,stpmic1-wdt"; 3301183a0aaSEtienne Carriere status = "disabled"; 3311183a0aaSEtienne Carriere }; 3321183a0aaSEtienne Carriere }; 3331183a0aaSEtienne Carriere}; 3341183a0aaSEtienne Carriere 3351183a0aaSEtienne Carriere&ipcc { 336e076782bSEtienne Carriere status = "disabled"; 33712941fdcSEtienne Carriere}; 33812941fdcSEtienne Carriere 33981ed3bceSEtienne Carriere&iwdg1 { 34081ed3bceSEtienne Carriere timeout-sec = <32>; 34123ca2138SEtienne Carriere status = "okay"; 34281ed3bceSEtienne Carriere}; 34381ed3bceSEtienne Carriere 34412941fdcSEtienne Carriere&iwdg2 { 34512941fdcSEtienne Carriere timeout-sec = <32>; 346c825ffc9SEtienne Carriere status = "disabled"; 34712941fdcSEtienne Carriere}; 34812941fdcSEtienne Carriere 3491bf81340SEtienne Carriere&m4_rproc { 3501bf81340SEtienne Carriere memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 3517c9920cbSArnaud Pouliquen <&vdev0vring1>, <&vdev0buffer>, <&ipc_shmem>; 35213bd79f4SJohann Neuhauser mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; 35313bd79f4SJohann Neuhauser mbox-names = "vq0", "vq1", "shutdown", "detach"; 3541bf81340SEtienne Carriere interrupt-parent = <&exti>; 3551bf81340SEtienne Carriere interrupts = <68 1>; 356e076782bSEtienne Carriere status = "disabled"; 3571bf81340SEtienne Carriere}; 3581bf81340SEtienne Carriere 3591bf81340SEtienne Carriere&pwr_regulators { 3601bf81340SEtienne Carriere vdd-supply = <&vdd>; 3611bf81340SEtienne Carriere vdd_3v3_usbfs-supply = <&vdd_usb>; 3621bf81340SEtienne Carriere}; 3631bf81340SEtienne Carriere 3649446de32SEtienne Carriere&rcc { 36536f1fd6dSEtienne Carriere compatible = "st,stm32mp1-rcc"; 3669446de32SEtienne Carriere status = "okay"; 3679446de32SEtienne Carriere}; 3689446de32SEtienne Carriere 36912941fdcSEtienne Carriere&rng1 { 37012941fdcSEtienne Carriere status = "okay"; 37112941fdcSEtienne Carriere}; 37212941fdcSEtienne Carriere 3731183a0aaSEtienne Carriere&sdmmc1 { 3741183a0aaSEtienne Carriere pinctrl-names = "default", "opendrain", "sleep"; 3751183a0aaSEtienne Carriere pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 3761183a0aaSEtienne Carriere pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; 3771183a0aaSEtienne Carriere pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; 37813bd79f4SJohann Neuhauser cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 37913bd79f4SJohann Neuhauser disable-wp; 3801183a0aaSEtienne Carriere st,sig-dir; 3811183a0aaSEtienne Carriere st,neg-edge; 3821183a0aaSEtienne Carriere st,use-ckin; 3831183a0aaSEtienne Carriere bus-width = <4>; 3841183a0aaSEtienne Carriere vmmc-supply = <&vdd_sd>; 3851183a0aaSEtienne Carriere vqmmc-supply = <&sd_switch>; 38613bd79f4SJohann Neuhauser sd-uhs-sdr12; 38713bd79f4SJohann Neuhauser sd-uhs-sdr25; 38813bd79f4SJohann Neuhauser sd-uhs-sdr50; 38913bd79f4SJohann Neuhauser sd-uhs-ddr50; 390e076782bSEtienne Carriere status = "disabled"; 3911183a0aaSEtienne Carriere}; 3921183a0aaSEtienne Carriere 3931bf81340SEtienne Carriere&sdmmc2 { 3941bf81340SEtienne Carriere pinctrl-names = "default", "opendrain", "sleep"; 3951bf81340SEtienne Carriere pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; 3961bf81340SEtienne Carriere pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; 3971bf81340SEtienne Carriere pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; 3981bf81340SEtienne Carriere non-removable; 3991bf81340SEtienne Carriere no-sd; 4001bf81340SEtienne Carriere no-sdio; 4011bf81340SEtienne Carriere st,neg-edge; 4021bf81340SEtienne Carriere bus-width = <8>; 4031bf81340SEtienne Carriere vmmc-supply = <&v3v3>; 40413bd79f4SJohann Neuhauser vqmmc-supply = <&vdd>; 4051bf81340SEtienne Carriere mmc-ddr-3_3v; 406e076782bSEtienne Carriere status = "disabled"; 4071bf81340SEtienne Carriere}; 4081bf81340SEtienne Carriere 40912941fdcSEtienne Carriere&timers6 { 410e076782bSEtienne Carriere status = "disabled"; 4111183a0aaSEtienne Carriere /* spare dmas for other usage */ 4121183a0aaSEtienne Carriere /delete-property/dmas; 4131183a0aaSEtienne Carriere /delete-property/dma-names; 41412941fdcSEtienne Carriere timer@5 { 41512941fdcSEtienne Carriere status = "okay"; 41612941fdcSEtienne Carriere }; 41712941fdcSEtienne Carriere}; 41812941fdcSEtienne Carriere 41912941fdcSEtienne Carriere&uart4 { 42013bd79f4SJohann Neuhauser pinctrl-names = "default", "sleep", "idle"; 42112941fdcSEtienne Carriere pinctrl-0 = <&uart4_pins_a>; 42213bd79f4SJohann Neuhauser pinctrl-1 = <&uart4_sleep_pins_a>; 42313bd79f4SJohann Neuhauser pinctrl-2 = <&uart4_idle_pins_a>; 42413bd79f4SJohann Neuhauser /delete-property/dmas; 42513bd79f4SJohann Neuhauser /delete-property/dma-names; 42612941fdcSEtienne Carriere status = "okay"; 42712941fdcSEtienne Carriere}; 42812941fdcSEtienne Carriere 42913bd79f4SJohann Neuhauser&usbotg_hs { 43013bd79f4SJohann Neuhauser vbus-supply = <&vbus_otg>; 43113bd79f4SJohann Neuhauser}; 43213bd79f4SJohann Neuhauser 43312941fdcSEtienne Carriere&usbphyc_port0 { 43412941fdcSEtienne Carriere phy-supply = <&vdd_usb>; 43512941fdcSEtienne Carriere}; 43612941fdcSEtienne Carriere 43712941fdcSEtienne Carriere&usbphyc_port1 { 43812941fdcSEtienne Carriere phy-supply = <&vdd_usb>; 43912941fdcSEtienne Carriere}; 440