xref: /optee_os/core/arch/arm/dts/stm32mp157c-ed1-scmi.dts (revision 41115447f680b4c1c1e53fe9ba826f73b687474a)

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2023-2024
 */
/dts-v1/;

#include "stm32mp157c-ed1.dts"

/ {
	model = "STMicroelectronics STM32MP157C SCMI eval daughter";
	compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157";
};

&etzpc {
	st,decprot =
		<DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
		<DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>,
		<DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_NS_R_S_W, DECPROT_LOCK)>,
		<DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)>,
		<DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)>,
		<DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK)>;
};

&iwdg1 {
	timeout-sec = <32>;
};

&iwdg2 {
	timeout-sec = <32>;
	status = "okay";
	secure-status = "disabled";
};

&rcc {
	compatible = "st,stm32mp1-rcc-secure";
	status = "okay";
};