xref: /optee_os/core/arch/arm/dts/stm32mp135.dtsi (revision 9f34db38245c9b3a4e6e7e63eb78a75e23ab2da3)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2021-2024 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6
7#include "stm32mp133.dtsi"
8
9/ {
10	soc {
11		etzpc: etzpc@5c007000 {
12			ltdc: display-controller@5a001000 {
13				compatible = "st,stm32-ltdc";
14				reg = <0x5a001000 0x400>;
15				interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
16					     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
17				clocks = <&rcc LTDC_PX>;
18				clock-names = "lcd";
19				resets = <&rcc LTDC_R>;
20				access-controllers = <&etzpc STM32MP1_ETZPC_LTDC_ID>;
21				status = "disabled";
22			};
23		};
24	};
25};
26