xref: /optee_os/core/arch/arm/arm.mk (revision f7492391a90d5fa10df014c1cf54a4308a6e9a2a)
1CFG_LTC_OPTEE_THREAD ?= y
2# Size of emulated TrustZone protected SRAM, 448 kB.
3# Only applicable when paging is enabled.
4CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752
5CFG_LPAE_ADDR_SPACE_SIZE ?= (1ull << 32)
6
7CFG_MMAP_REGIONS ?= 13
8CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10)
9
10ifeq ($(CFG_ARM64_core),y)
11CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64
12CFG_KERN_LINKER_ARCH ?= aarch64
13else
14ifeq ($(CFG_ARM32_core),y)
15CFG_KERN_LINKER_FORMAT ?= elf32-littlearm
16CFG_KERN_LINKER_ARCH ?= arm
17else
18$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined)
19endif
20endif
21
22ifeq ($(CFG_TA_FLOAT_SUPPORT),y)
23# Use hard-float for floating point support in user TAs instead of
24# soft-float
25CFG_WITH_VFP ?= y
26ifeq ($(CFG_ARM64_core),y)
27# AArch64 has no fallback to soft-float
28$(call force,CFG_WITH_VFP,y)
29endif
30ifeq ($(CFG_WITH_VFP),y)
31arm64-platform-hard-float-enabled := y
32ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y)
33arm32-platform-hard-float-enabled := y
34endif
35endif
36endif
37
38# Adds protection against CVE-2017-5715 also know as Spectre
39# (https://spectreattack.com)
40# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf
41# Variant 2
42CFG_CORE_WORKAROUND_SPECTRE_BP ?= y
43# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from
44# secure EL0 instead of non-secure world.
45CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP)
46
47# Adds protection against a tool like Cachegrab
48# (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts
49# to prime and later analyze the L1D, L1I and BTB caches to gain
50# information from secure world execution.
51CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME ?= y
52ifeq ($(CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME),y)
53$(call force,CFG_CORE_WORKAROUND_SPECTRE_BP,y,Required by CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME)
54endif
55
56CFG_CORE_RWDATA_NOEXEC ?= y
57CFG_CORE_RODATA_NOEXEC ?= n
58ifeq ($(CFG_CORE_RODATA_NOEXEC),y)
59$(call force,CFG_CORE_RWDATA_NOEXEC,y)
60endif
61# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it
62CFG_SCTLR_ALIGNMENT_CHECK ?= y
63
64ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y)
65$(call force,CFG_WITH_LPAE,y)
66endif
67
68# Unmaps all kernel mode code except the code needed to take exceptions
69# from user space and restore kernel mode mapping again. This gives more
70# strict control over what is accessible while in user mode.
71# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75
72CFG_CORE_UNMAP_CORE_AT_EL0 ?= y
73
74# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and
75# save/restore PMCR during world switch.
76CFG_SM_NO_CYCLE_COUNTING ?= y
77
78ifeq ($(CFG_ARM32_core),y)
79# Configration directive related to ARMv7 optee boot arguments.
80# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address.
81# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address.
82# CFG_DT_ADDR:       if defined, forces Device Tree data physical address.
83endif
84
85core-platform-cppflags	+= -I$(arch-dir)/include
86core-platform-subdirs += \
87	$(addprefix $(arch-dir)/, kernel crypto mm tee pta) $(platform-dir)
88
89ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y)
90core-platform-subdirs += $(arch-dir)/sm
91endif
92
93arm64-platform-cppflags += -DARM64=1 -D__LP64__=1
94arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1
95
96platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe
97platform-aflags-generic ?= -pipe
98
99arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft
100arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations
101arm32-platform-cflags-generic-thumb ?= -mthumb \
102			-fno-short-enums -fno-common -mno-unaligned-access
103arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \
104			-fno-short-enums -fno-common -mno-unaligned-access
105arm32-platform-aflags-no-hard-float ?=
106
107arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only
108arm64-platform-cflags-hard-float ?=
109arm64-platform-cflags-generic ?= -mstrict-align
110
111ifeq ($(DEBUG),1)
112# For backwards compatibility
113$(call force,CFG_CC_OPTIMIZE_FOR_SIZE,n)
114$(call force,CFG_DEBUG_INFO,y)
115endif
116
117CFG_CC_OPTIMIZE_FOR_SIZE ?= y
118ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),y)
119platform-cflags-optimization ?= -Os
120else
121platform-cflags-optimization ?= -O0
122endif
123
124CFG_DEBUG_INFO ?= y
125ifeq ($(CFG_DEBUG_INFO),y)
126platform-cflags-debug-info ?= -g3
127platform-aflags-debug-info ?= -g
128endif
129
130core-platform-cflags += $(platform-cflags-optimization)
131core-platform-cflags += $(platform-cflags-generic)
132core-platform-cflags += $(platform-cflags-debug-info)
133
134core-platform-aflags += $(platform-aflags-generic)
135core-platform-aflags += $(platform-aflags-debug-info)
136
137ifeq ($(CFG_ARM64_core),y)
138arch-bits-core := 64
139core-platform-cppflags += $(arm64-platform-cppflags)
140core-platform-cflags += $(arm64-platform-cflags)
141core-platform-cflags += $(arm64-platform-cflags-generic)
142core-platform-cflags += $(arm64-platform-cflags-no-hard-float)
143core-platform-aflags += $(arm64-platform-aflags)
144else
145arch-bits-core := 32
146core-platform-cppflags += $(arm32-platform-cppflags)
147core-platform-cflags += $(arm32-platform-cflags)
148core-platform-cflags += $(arm32-platform-cflags-no-hard-float)
149ifeq ($(CFG_UNWIND),y)
150core-platform-cflags += -funwind-tables
151endif
152core-platform-cflags += $(arm32-platform-cflags-generic-thumb)
153core-platform-aflags += $(core_arm32-platform-aflags)
154core-platform-aflags += $(arm32-platform-aflags)
155endif
156
157# Provide default supported-ta-targets if not set by the platform config
158ifeq (,$(supported-ta-targets))
159supported-ta-targets = ta_arm32
160ifeq ($(CFG_ARM64_core),y)
161supported-ta-targets += ta_arm64
162endif
163endif
164
165ta-targets := $(if $(CFG_USER_TA_TARGETS),$(filter $(supported-ta-targets),$(CFG_USER_TA_TARGETS)),$(supported-ta-targets))
166unsup-targets := $(filter-out $(ta-targets),$(CFG_USER_TA_TARGETS))
167ifneq (,$(unsup-targets))
168$(error CFG_USER_TA_TARGETS contains unsupported value(s): $(unsup-targets). Valid values: $(supported-ta-targets))
169endif
170
171ifneq ($(filter ta_arm32,$(ta-targets)),)
172# Variables for ta-target/sm "ta_arm32"
173CFG_ARM32_ta_arm32 := y
174arch-bits-ta_arm32 := 32
175ta_arm32-platform-cppflags += $(arm32-platform-cppflags)
176ta_arm32-platform-cflags += $(arm32-platform-cflags)
177ta_arm32-platform-cflags += $(platform-cflags-optimization)
178ta_arm32-platform-cflags += $(platform-cflags-debug-info)
179ta_arm32-platform-cflags += -fpic
180
181# Thumb mode doesn't support function graph tracing due to missing
182# frame pointer support required to trace function call chain. So
183# rather compile in ARM mode if function tracing is enabled.
184ifeq ($(CFG_TA_FTRACE_SUPPORT),y)
185ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm)
186else
187ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-thumb)
188endif
189
190ifeq ($(arm32-platform-hard-float-enabled),y)
191ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float)
192else
193ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float)
194endif
195ifeq ($(CFG_UNWIND),y)
196ta_arm32-platform-cflags += -funwind-tables
197endif
198ta_arm32-platform-aflags += $(platform-aflags-generic)
199ta_arm32-platform-aflags += $(platform-aflags-debug-info)
200ta_arm32-platform-aflags += $(arm32-platform-aflags)
201
202ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32
203ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags
204ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags
205ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags
206
207ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_
208ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_
209ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_
210endif
211
212ifneq ($(filter ta_arm64,$(ta-targets)),)
213# Variables for ta-target/sm "ta_arm64"
214CFG_ARM64_ta_arm64 := y
215arch-bits-ta_arm64 := 64
216ta_arm64-platform-cppflags += $(arm64-platform-cppflags)
217ta_arm64-platform-cflags += $(arm64-platform-cflags)
218ta_arm64-platform-cflags += $(platform-cflags-optimization)
219ta_arm64-platform-cflags += $(platform-cflags-debug-info)
220ta_arm64-platform-cflags += -fpic
221ta_arm64-platform-cflags += $(arm64-platform-cflags-generic)
222ifeq ($(arm64-platform-hard-float-enabled),y)
223ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float)
224else
225ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float)
226endif
227ta_arm64-platform-aflags += $(platform-aflags-generic)
228ta_arm64-platform-aflags += $(platform-aflags-debug-info)
229ta_arm64-platform-aflags += $(arm64-platform-aflags)
230
231ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64
232ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags
233ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags
234ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags
235
236ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_
237ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_
238endif
239
240# Set cross compiler prefix for each submodule
241$(foreach sm, core $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm)))))
242
243arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt
244arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h
245arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S
246arm32-sysregs += $(arm32-sysreg-txt)
247
248ifeq ($(CFG_ARM_GICV3),y)
249arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt
250arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h
251arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S
252arm32-sysregs += $(arm32-gicv3-sysreg-txt)
253endif
254
255arm32-sysregs-out := $(out-dir)/$(sm)/include/generated
256
257define process-arm32-sysreg
258FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h)
259cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h)
260
261$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py
262	@$(cmd-echo-silent) '  GEN     $$@'
263	$(q)mkdir -p $$(dir $$@)
264	$(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \
265		< $$< > $$@
266
267FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s)
268cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s)
269
270$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py
271	@$(cmd-echo-silent) '  GEN     $$@'
272	$(q)mkdir -p $$(dir $$@)
273	$(q)scripts/arm32_sysreg.py --s_file < $$< > $$@
274endef #process-arm32-sysreg
275
276$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr))))
277