1# Setup compiler for the core module 2ifeq ($(CFG_ARM64_core),y) 3arch-bits-core := 64 4else 5arch-bits-core := 32 6endif 7CROSS_COMPILE_core := $(CROSS_COMPILE$(arch-bits-core)) 8COMPILER_core := $(COMPILER) 9include mk/$(COMPILER_core).mk 10 11# Defines the cc-option macro using the compiler set for the core module 12include mk/cc-option.mk 13 14CFG_LTC_OPTEE_THREAD ?= y 15# Size of emulated TrustZone protected SRAM, 448 kB. 16# Only applicable when paging is enabled. 17CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752 18 19ifneq ($(CFG_LPAE_ADDR_SPACE_SIZE),) 20$(warning Error: CFG_LPAE_ADDR_SPACE_SIZE is not supported any longer) 21$(error Error: Please use CFG_LPAE_ADDR_SPACE_BITS instead) 22endif 23 24CFG_LPAE_ADDR_SPACE_BITS ?= 32 25 26CFG_MMAP_REGIONS ?= 13 27CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10) 28 29ifeq ($(CFG_ARM64_core),y) 30CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64 31CFG_KERN_LINKER_ARCH ?= aarch64 32# TCR_EL1.IPS needs to be initialized according to the largest physical 33# address that we need to map. 34# Physical address size 35# 32 bits, 4GB. 36# 36 bits, 64GB. 37# (etc.) 38CFG_CORE_ARM64_PA_BITS ?= 32 39else 40ifeq ($(CFG_ARM32_core),y) 41CFG_KERN_LINKER_FORMAT ?= elf32-littlearm 42CFG_KERN_LINKER_ARCH ?= arm 43else 44$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined) 45endif 46endif 47 48ifeq ($(CFG_TA_FLOAT_SUPPORT),y) 49# Use hard-float for floating point support in user TAs instead of 50# soft-float 51CFG_WITH_VFP ?= y 52ifeq ($(CFG_ARM64_core),y) 53# AArch64 has no fallback to soft-float 54$(call force,CFG_WITH_VFP,y) 55endif 56ifeq ($(CFG_WITH_VFP),y) 57arm64-platform-hard-float-enabled := y 58ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y) 59arm32-platform-hard-float-enabled := y 60endif 61endif 62endif 63 64# Adds protection against CVE-2017-5715 also know as Spectre 65# (https://spectreattack.com) 66# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf 67# Variant 2 68CFG_CORE_WORKAROUND_SPECTRE_BP ?= y 69# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from 70# secure EL0 instead of non-secure world. 71CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP) 72 73# Adds protection against a tool like Cachegrab 74# (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts 75# to prime and later analyze the L1D, L1I and BTB caches to gain 76# information from secure world execution. 77CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME ?= y 78ifeq ($(CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME),y) 79$(call force,CFG_CORE_WORKAROUND_SPECTRE_BP,y,Required by CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME) 80endif 81 82CFG_CORE_RWDATA_NOEXEC ?= y 83CFG_CORE_RODATA_NOEXEC ?= n 84ifeq ($(CFG_CORE_RODATA_NOEXEC),y) 85$(call force,CFG_CORE_RWDATA_NOEXEC,y) 86endif 87# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it 88CFG_SCTLR_ALIGNMENT_CHECK ?= n 89 90ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y) 91$(call force,CFG_WITH_LPAE,y) 92endif 93 94# SPMC configuration "S-EL1 SPMC" where SPM Core is implemented at S-EL1, 95# that is, OP-TEE. 96# Note that this is an experimental feature, ABIs etc may have incompatible 97# changes 98ifeq ($(CFG_CORE_SEL1_SPMC),y) 99$(call force,CFG_CORE_FFA,y) 100endif 101 102# Unmaps all kernel mode code except the code needed to take exceptions 103# from user space and restore kernel mode mapping again. This gives more 104# strict control over what is accessible while in user mode. 105# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75 106CFG_CORE_UNMAP_CORE_AT_EL0 ?= y 107 108# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and 109# save/restore PMCR during world switch. 110CFG_SM_NO_CYCLE_COUNTING ?= y 111 112ifeq ($(CFG_ARM32_core),y) 113# Configration directive related to ARMv7 optee boot arguments. 114# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address. 115# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address. 116# CFG_DT_ADDR: if defined, forces Device Tree data physical address. 117endif 118 119core-platform-cppflags += -I$(arch-dir)/include 120core-platform-subdirs += \ 121 $(addprefix $(arch-dir)/, kernel crypto mm tee) $(platform-dir) 122 123ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y) 124core-platform-subdirs += $(arch-dir)/sm 125endif 126 127arm64-platform-cppflags += -DARM64=1 -D__LP64__=1 128arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1 129 130platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe 131platform-aflags-generic ?= -pipe 132 133arm32-platform-aflags += -marm 134 135arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft 136arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations 137arm32-platform-cflags-generic-thumb ?= -mthumb \ 138 -fno-short-enums -fno-common -mno-unaligned-access 139arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \ 140 -fno-short-enums -fno-common -mno-unaligned-access 141arm32-platform-aflags-no-hard-float ?= 142 143arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only 144arm64-platform-cflags-hard-float ?= 145arm64-platform-cflags-generic := -mstrict-align $(call cc-option,-mno-outline-atomics,) 146 147ifeq ($(DEBUG),1) 148# For backwards compatibility 149$(call force,CFG_CC_OPT_LEVEL,0) 150$(call force,CFG_DEBUG_INFO,y) 151endif 152ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),n) 153# For backwards compatibility 154$(call force,CFG_CC_OPT_LEVEL,0) 155endif 156 157# Optimize for size by default, usually gives good performance too 158CFG_CC_OPT_LEVEL ?= s 159platform-cflags-optimization ?= -O$(CFG_CC_OPT_LEVEL) 160 161CFG_DEBUG_INFO ?= y 162ifeq ($(CFG_DEBUG_INFO),y) 163platform-cflags-debug-info ?= -g3 164platform-aflags-debug-info ?= -g 165endif 166 167core-platform-cflags += $(platform-cflags-optimization) 168core-platform-cflags += $(platform-cflags-generic) 169core-platform-cflags += $(platform-cflags-debug-info) 170 171core-platform-aflags += $(platform-aflags-generic) 172core-platform-aflags += $(platform-aflags-debug-info) 173 174ifeq ($(CFG_CORE_ASLR),y) 175core-platform-cflags += -fpie 176endif 177 178ifeq ($(CFG_ARM64_core),y) 179core-platform-cppflags += $(arm64-platform-cppflags) 180core-platform-cflags += $(arm64-platform-cflags) 181core-platform-cflags += $(arm64-platform-cflags-generic) 182core-platform-cflags += $(arm64-platform-cflags-no-hard-float) 183core-platform-aflags += $(arm64-platform-aflags) 184else 185core-platform-cppflags += $(arm32-platform-cppflags) 186core-platform-cflags += $(arm32-platform-cflags) 187core-platform-cflags += $(arm32-platform-cflags-no-hard-float) 188ifeq ($(CFG_UNWIND),y) 189core-platform-cflags += -funwind-tables 190endif 191ifeq ($(CFG_SYSCALL_FTRACE),y) 192core-platform-cflags += $(arm32-platform-cflags-generic-arm) 193else 194core-platform-cflags += $(arm32-platform-cflags-generic-thumb) 195endif 196core-platform-aflags += $(core_arm32-platform-aflags) 197core-platform-aflags += $(arm32-platform-aflags) 198endif 199 200# Provide default supported-ta-targets if not set by the platform config 201ifeq (,$(supported-ta-targets)) 202supported-ta-targets = ta_arm32 203ifeq ($(CFG_ARM64_core),y) 204supported-ta-targets += ta_arm64 205endif 206endif 207 208ta-targets := $(if $(CFG_USER_TA_TARGETS),$(filter $(supported-ta-targets),$(CFG_USER_TA_TARGETS)),$(supported-ta-targets)) 209unsup-targets := $(filter-out $(ta-targets),$(CFG_USER_TA_TARGETS)) 210ifneq (,$(unsup-targets)) 211$(error CFG_USER_TA_TARGETS contains unsupported value(s): $(unsup-targets). Valid values: $(supported-ta-targets)) 212endif 213 214ifneq ($(filter ta_arm32,$(ta-targets)),) 215# Variables for ta-target/sm "ta_arm32" 216CFG_ARM32_ta_arm32 := y 217arch-bits-ta_arm32 := 32 218ta_arm32-platform-cppflags += $(arm32-platform-cppflags) 219ta_arm32-platform-cflags += $(arm32-platform-cflags) 220ta_arm32-platform-cflags += $(platform-cflags-optimization) 221ta_arm32-platform-cflags += $(platform-cflags-debug-info) 222ta_arm32-platform-cflags += -fpic 223 224# Thumb mode doesn't support function graph tracing due to missing 225# frame pointer support required to trace function call chain. So 226# rather compile in ARM mode if function tracing is enabled. 227ifeq ($(CFG_FTRACE_SUPPORT),y) 228ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm) 229else 230ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-thumb) 231endif 232 233ifeq ($(arm32-platform-hard-float-enabled),y) 234ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float) 235else 236ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float) 237endif 238ifeq ($(CFG_UNWIND),y) 239ta_arm32-platform-cflags += -funwind-tables 240endif 241ta_arm32-platform-aflags += $(platform-aflags-generic) 242ta_arm32-platform-aflags += $(platform-aflags-debug-info) 243ta_arm32-platform-aflags += $(arm32-platform-aflags) 244 245ta_arm32-platform-cxxflags += -fpic 246ta_arm32-platform-cxxflags += $(arm32-platform-cxxflags) 247ta_arm32-platform-cxxflags += $(platform-cflags-optimization) 248ta_arm32-platform-cxxflags += $(platform-cflags-debug-info) 249 250ifeq ($(arm32-platform-hard-float-enabled),y) 251ta_arm32-platform-cxxflags += $(arm32-platform-cflags-hard-float) 252else 253ta_arm32-platform-cxxflags += $(arm32-platform-cflags-no-hard-float) 254endif 255 256ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32 257ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags 258ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags 259ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags 260ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cxxflags 261 262ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_ 263ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_ 264ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_ 265ta-mk-file-export-add-ta_arm32 += COMPILER ?= gcc_nl_ 266ta-mk-file-export-add-ta_arm32 += COMPILER_ta_arm32 ?= $$(COMPILER)_nl_ 267ta-mk-file-export-add-ta_arm32 += PYTHON3 ?= python3_nl_ 268endif 269 270ifneq ($(filter ta_arm64,$(ta-targets)),) 271# Variables for ta-target/sm "ta_arm64" 272CFG_ARM64_ta_arm64 := y 273arch-bits-ta_arm64 := 64 274ta_arm64-platform-cppflags += $(arm64-platform-cppflags) 275ta_arm64-platform-cflags += $(arm64-platform-cflags) 276ta_arm64-platform-cflags += $(platform-cflags-optimization) 277ta_arm64-platform-cflags += $(platform-cflags-debug-info) 278ta_arm64-platform-cflags += -fpic 279ta_arm64-platform-cflags += $(arm64-platform-cflags-generic) 280ifeq ($(arm64-platform-hard-float-enabled),y) 281ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float) 282else 283ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float) 284endif 285ta_arm64-platform-aflags += $(platform-aflags-generic) 286ta_arm64-platform-aflags += $(platform-aflags-debug-info) 287ta_arm64-platform-aflags += $(arm64-platform-aflags) 288 289ta_arm64-platform-cxxflags += -fpic 290ta_arm64-platform-cxxflags += $(platform-cflags-optimization) 291ta_arm64-platform-cxxflags += $(platform-cflags-debug-info) 292 293ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64 294ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags 295ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags 296ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags 297ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cxxflags 298 299ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_ 300ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_ 301ta-mk-file-export-add-ta_arm64 += COMPILER ?= gcc_nl_ 302ta-mk-file-export-add-ta_arm64 += COMPILER_ta_arm64 ?= $$(COMPILER)_nl_ 303ta-mk-file-export-add-ta_arm64 += PYTHON3 ?= python3_nl_ 304endif 305 306# Set cross compiler prefix for each TA target 307$(foreach sm, $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm))))) 308 309arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt 310arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h 311arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S 312arm32-sysregs += $(arm32-sysreg-txt) 313 314ifeq ($(CFG_ARM_GICV3),y) 315arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt 316arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h 317arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S 318arm32-sysregs += $(arm32-gicv3-sysreg-txt) 319endif 320 321arm32-sysregs-out := $(out-dir)/$(sm)/include/generated 322 323define process-arm32-sysreg 324FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 325cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 326 327$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py 328 @$(cmd-echo-silent) ' GEN $$@' 329 $(q)mkdir -p $$(dir $$@) 330 $(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \ 331 < $$< > $$@ 332 333FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 334cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 335 336$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py 337 @$(cmd-echo-silent) ' GEN $$@' 338 $(q)mkdir -p $$(dir $$@) 339 $(q)scripts/arm32_sysreg.py --s_file < $$< > $$@ 340endef #process-arm32-sysreg 341 342$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr)))) 343