1# Setup compiler for the core module 2ifeq ($(CFG_ARM64_core),y) 3arch-bits-core := 64 4else 5arch-bits-core := 32 6endif 7CROSS_COMPILE_core := $(CROSS_COMPILE$(arch-bits-core)) 8COMPILER_core := $(COMPILER) 9include mk/$(COMPILER_core).mk 10 11# Defines the cc-option macro using the compiler set for the core module 12include mk/cc-option.mk 13 14CFG_LTC_OPTEE_THREAD ?= y 15# Size of emulated TrustZone protected SRAM, 448 kB. 16# Only applicable when paging is enabled. 17CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752 18CFG_LPAE_ADDR_SPACE_SIZE ?= (1ull << 32) 19 20CFG_MMAP_REGIONS ?= 13 21CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10) 22 23ifeq ($(CFG_ARM64_core),y) 24CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64 25CFG_KERN_LINKER_ARCH ?= aarch64 26# TCR_EL1.IPS needs to be initialized according to the largest physical 27# address that we need to map. 28# Physical address size 29# 32 bits, 4GB. 30# 36 bits, 64GB. 31# (etc.) 32CFG_CORE_ARM64_PA_BITS ?= 32 33else 34ifeq ($(CFG_ARM32_core),y) 35CFG_KERN_LINKER_FORMAT ?= elf32-littlearm 36CFG_KERN_LINKER_ARCH ?= arm 37else 38$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined) 39endif 40endif 41 42ifeq ($(CFG_TA_FLOAT_SUPPORT),y) 43# Use hard-float for floating point support in user TAs instead of 44# soft-float 45CFG_WITH_VFP ?= y 46ifeq ($(CFG_ARM64_core),y) 47# AArch64 has no fallback to soft-float 48$(call force,CFG_WITH_VFP,y) 49endif 50ifeq ($(CFG_WITH_VFP),y) 51arm64-platform-hard-float-enabled := y 52ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y) 53arm32-platform-hard-float-enabled := y 54endif 55endif 56endif 57 58# Adds protection against CVE-2017-5715 also know as Spectre 59# (https://spectreattack.com) 60# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf 61# Variant 2 62CFG_CORE_WORKAROUND_SPECTRE_BP ?= y 63# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from 64# secure EL0 instead of non-secure world. 65CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP) 66 67# Adds protection against a tool like Cachegrab 68# (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts 69# to prime and later analyze the L1D, L1I and BTB caches to gain 70# information from secure world execution. 71CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME ?= y 72ifeq ($(CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME),y) 73$(call force,CFG_CORE_WORKAROUND_SPECTRE_BP,y,Required by CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME) 74endif 75 76CFG_CORE_RWDATA_NOEXEC ?= y 77CFG_CORE_RODATA_NOEXEC ?= n 78ifeq ($(CFG_CORE_RODATA_NOEXEC),y) 79$(call force,CFG_CORE_RWDATA_NOEXEC,y) 80endif 81# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it 82CFG_SCTLR_ALIGNMENT_CHECK ?= n 83 84ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y) 85$(call force,CFG_WITH_LPAE,y) 86endif 87 88# SPMC configuration "S-EL1 SPMC" where SPM Core is implemented at S-EL1, 89# that is, OP-TEE. 90# Note that this is an experimental feature, ABIs etc may have incompatible 91# changes 92ifeq ($(CFG_CORE_SEL1_SPMC),y) 93$(call force,CFG_CORE_FFA,y) 94endif 95 96# Unmaps all kernel mode code except the code needed to take exceptions 97# from user space and restore kernel mode mapping again. This gives more 98# strict control over what is accessible while in user mode. 99# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75 100CFG_CORE_UNMAP_CORE_AT_EL0 ?= y 101 102# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and 103# save/restore PMCR during world switch. 104CFG_SM_NO_CYCLE_COUNTING ?= y 105 106ifeq ($(CFG_ARM32_core),y) 107# Configration directive related to ARMv7 optee boot arguments. 108# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address. 109# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address. 110# CFG_DT_ADDR: if defined, forces Device Tree data physical address. 111endif 112 113core-platform-cppflags += -I$(arch-dir)/include 114core-platform-subdirs += \ 115 $(addprefix $(arch-dir)/, kernel crypto mm tee) $(platform-dir) 116 117ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y) 118core-platform-subdirs += $(arch-dir)/sm 119endif 120 121arm64-platform-cppflags += -DARM64=1 -D__LP64__=1 122arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1 123 124platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe 125platform-aflags-generic ?= -pipe 126 127arm32-platform-aflags += -marm 128 129arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft 130arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations 131arm32-platform-cflags-generic-thumb ?= -mthumb \ 132 -fno-short-enums -fno-common -mno-unaligned-access 133arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \ 134 -fno-short-enums -fno-common -mno-unaligned-access 135arm32-platform-aflags-no-hard-float ?= 136 137arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only 138arm64-platform-cflags-hard-float ?= 139arm64-platform-cflags-generic := -mstrict-align $(call cc-option,-mno-outline-atomics,) 140 141ifeq ($(DEBUG),1) 142# For backwards compatibility 143$(call force,CFG_CC_OPT_LEVEL,0) 144$(call force,CFG_DEBUG_INFO,y) 145endif 146ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),n) 147# For backwards compatibility 148$(call force,CFG_CC_OPT_LEVEL,0) 149endif 150 151# Optimize for size by default, usually gives good performance too 152CFG_CC_OPT_LEVEL ?= s 153platform-cflags-optimization ?= -O$(CFG_CC_OPT_LEVEL) 154 155CFG_DEBUG_INFO ?= y 156ifeq ($(CFG_DEBUG_INFO),y) 157platform-cflags-debug-info ?= -g3 158platform-aflags-debug-info ?= -g 159endif 160 161core-platform-cflags += $(platform-cflags-optimization) 162core-platform-cflags += $(platform-cflags-generic) 163core-platform-cflags += $(platform-cflags-debug-info) 164 165core-platform-aflags += $(platform-aflags-generic) 166core-platform-aflags += $(platform-aflags-debug-info) 167 168ifeq ($(CFG_CORE_ASLR),y) 169core-platform-cflags += -fpie 170endif 171 172ifeq ($(CFG_ARM64_core),y) 173core-platform-cppflags += $(arm64-platform-cppflags) 174core-platform-cflags += $(arm64-platform-cflags) 175core-platform-cflags += $(arm64-platform-cflags-generic) 176core-platform-cflags += $(arm64-platform-cflags-no-hard-float) 177core-platform-aflags += $(arm64-platform-aflags) 178else 179core-platform-cppflags += $(arm32-platform-cppflags) 180core-platform-cflags += $(arm32-platform-cflags) 181core-platform-cflags += $(arm32-platform-cflags-no-hard-float) 182ifeq ($(CFG_UNWIND),y) 183core-platform-cflags += -funwind-tables 184endif 185ifeq ($(CFG_SYSCALL_FTRACE),y) 186core-platform-cflags += $(arm32-platform-cflags-generic-arm) 187else 188core-platform-cflags += $(arm32-platform-cflags-generic-thumb) 189endif 190core-platform-aflags += $(core_arm32-platform-aflags) 191core-platform-aflags += $(arm32-platform-aflags) 192endif 193 194# Provide default supported-ta-targets if not set by the platform config 195ifeq (,$(supported-ta-targets)) 196supported-ta-targets = ta_arm32 197ifeq ($(CFG_ARM64_core),y) 198supported-ta-targets += ta_arm64 199endif 200endif 201 202ta-targets := $(if $(CFG_USER_TA_TARGETS),$(filter $(supported-ta-targets),$(CFG_USER_TA_TARGETS)),$(supported-ta-targets)) 203unsup-targets := $(filter-out $(ta-targets),$(CFG_USER_TA_TARGETS)) 204ifneq (,$(unsup-targets)) 205$(error CFG_USER_TA_TARGETS contains unsupported value(s): $(unsup-targets). Valid values: $(supported-ta-targets)) 206endif 207 208ifneq ($(filter ta_arm32,$(ta-targets)),) 209# Variables for ta-target/sm "ta_arm32" 210CFG_ARM32_ta_arm32 := y 211arch-bits-ta_arm32 := 32 212ta_arm32-platform-cppflags += $(arm32-platform-cppflags) 213ta_arm32-platform-cflags += $(arm32-platform-cflags) 214ta_arm32-platform-cflags += $(platform-cflags-optimization) 215ta_arm32-platform-cflags += $(platform-cflags-debug-info) 216ta_arm32-platform-cflags += -fpic 217 218# Thumb mode doesn't support function graph tracing due to missing 219# frame pointer support required to trace function call chain. So 220# rather compile in ARM mode if function tracing is enabled. 221ifeq ($(CFG_FTRACE_SUPPORT),y) 222ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm) 223else 224ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-thumb) 225endif 226 227ifeq ($(arm32-platform-hard-float-enabled),y) 228ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float) 229else 230ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float) 231endif 232ifeq ($(CFG_UNWIND),y) 233ta_arm32-platform-cflags += -funwind-tables 234endif 235ta_arm32-platform-aflags += $(platform-aflags-generic) 236ta_arm32-platform-aflags += $(platform-aflags-debug-info) 237ta_arm32-platform-aflags += $(arm32-platform-aflags) 238 239ta_arm32-platform-cxxflags += -fpic 240ta_arm32-platform-cxxflags += $(arm32-platform-cxxflags) 241ta_arm32-platform-cxxflags += $(platform-cflags-optimization) 242ta_arm32-platform-cxxflags += $(platform-cflags-debug-info) 243 244ifeq ($(arm32-platform-hard-float-enabled),y) 245ta_arm32-platform-cxxflags += $(arm32-platform-cflags-hard-float) 246else 247ta_arm32-platform-cxxflags += $(arm32-platform-cflags-no-hard-float) 248endif 249 250ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32 251ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags 252ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags 253ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags 254ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cxxflags 255 256ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_ 257ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_ 258ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_ 259ta-mk-file-export-add-ta_arm32 += COMPILER ?= gcc_nl_ 260ta-mk-file-export-add-ta_arm32 += COMPILER_ta_arm32 ?= $$(COMPILER)_nl_ 261ta-mk-file-export-add-ta_arm32 += PYTHON3 ?= python3_nl_ 262endif 263 264ifneq ($(filter ta_arm64,$(ta-targets)),) 265# Variables for ta-target/sm "ta_arm64" 266CFG_ARM64_ta_arm64 := y 267arch-bits-ta_arm64 := 64 268ta_arm64-platform-cppflags += $(arm64-platform-cppflags) 269ta_arm64-platform-cflags += $(arm64-platform-cflags) 270ta_arm64-platform-cflags += $(platform-cflags-optimization) 271ta_arm64-platform-cflags += $(platform-cflags-debug-info) 272ta_arm64-platform-cflags += -fpic 273ta_arm64-platform-cflags += $(arm64-platform-cflags-generic) 274ifeq ($(arm64-platform-hard-float-enabled),y) 275ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float) 276else 277ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float) 278endif 279ta_arm64-platform-aflags += $(platform-aflags-generic) 280ta_arm64-platform-aflags += $(platform-aflags-debug-info) 281ta_arm64-platform-aflags += $(arm64-platform-aflags) 282 283ta_arm64-platform-cxxflags += -fpic 284ta_arm64-platform-cxxflags += $(platform-cflags-optimization) 285ta_arm64-platform-cxxflags += $(platform-cflags-debug-info) 286 287ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64 288ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags 289ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags 290ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags 291ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cxxflags 292 293ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_ 294ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_ 295ta-mk-file-export-add-ta_arm64 += COMPILER ?= gcc_nl_ 296ta-mk-file-export-add-ta_arm64 += COMPILER_ta_arm64 ?= $$(COMPILER)_nl_ 297ta-mk-file-export-add-ta_arm64 += PYTHON3 ?= python3_nl_ 298endif 299 300# Set cross compiler prefix for each TA target 301$(foreach sm, $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm))))) 302 303arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt 304arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h 305arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S 306arm32-sysregs += $(arm32-sysreg-txt) 307 308ifeq ($(CFG_ARM_GICV3),y) 309arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt 310arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h 311arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S 312arm32-sysregs += $(arm32-gicv3-sysreg-txt) 313endif 314 315arm32-sysregs-out := $(out-dir)/$(sm)/include/generated 316 317define process-arm32-sysreg 318FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 319cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 320 321$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py 322 @$(cmd-echo-silent) ' GEN $$@' 323 $(q)mkdir -p $$(dir $$@) 324 $(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \ 325 < $$< > $$@ 326 327FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 328cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 329 330$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py 331 @$(cmd-echo-silent) ' GEN $$@' 332 $(q)mkdir -p $$(dir $$@) 333 $(q)scripts/arm32_sysreg.py --s_file < $$< > $$@ 334endef #process-arm32-sysreg 335 336$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr)))) 337