1CFG_LTC_OPTEE_THREAD ?= y 2# Size of emulated TrustZone protected SRAM, 448 kB. 3# Only applicable when paging is enabled. 4CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752 5CFG_LPAE_ADDR_SPACE_SIZE ?= (1ull << 32) 6 7CFG_MMAP_REGIONS ?= 13 8CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10) 9 10ifeq ($(CFG_ARM64_core),y) 11CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64 12CFG_KERN_LINKER_ARCH ?= aarch64 13else 14ifeq ($(CFG_ARM32_core),y) 15CFG_KERN_LINKER_FORMAT ?= elf32-littlearm 16CFG_KERN_LINKER_ARCH ?= arm 17else 18$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined) 19endif 20endif 21 22ifeq ($(CFG_TA_FLOAT_SUPPORT),y) 23# Use hard-float for floating point support in user TAs instead of 24# soft-float 25CFG_WITH_VFP ?= y 26ifeq ($(CFG_ARM64_core),y) 27# AArch64 has no fallback to soft-float 28$(call force,CFG_WITH_VFP,y) 29endif 30ifeq ($(CFG_WITH_VFP),y) 31arm64-platform-hard-float-enabled := y 32ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y) 33arm32-platform-hard-float-enabled := y 34endif 35endif 36endif 37 38# Adds protection against CVE-2017-5715 also know as Spectre 39# (https://spectreattack.com) 40# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf 41# Variant 2 42CFG_CORE_WORKAROUND_SPECTRE_BP ?= y 43# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from 44# secure EL0 instead of non-secure world. 45CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP) 46 47CFG_CORE_RWDATA_NOEXEC ?= y 48CFG_CORE_RODATA_NOEXEC ?= n 49ifeq ($(CFG_CORE_RODATA_NOEXEC),y) 50$(call force,CFG_CORE_RWDATA_NOEXEC,y) 51endif 52# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it 53CFG_SCTLR_ALIGNMENT_CHECK ?= y 54 55ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y) 56$(call force,CFG_WITH_LPAE,y) 57endif 58 59# Unmaps all kernel mode code except the code needed to take exceptions 60# from user space and restore kernel mode mapping again. This gives more 61# strict control over what is accessible while in user mode. 62# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75 63CFG_CORE_UNMAP_CORE_AT_EL0 ?= y 64 65# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and 66# save/restore PMCR during world switch. 67CFG_SM_NO_CYCLE_COUNTING ?= y 68 69ifeq ($(CFG_ARM32_core),y) 70# Configration directive related to ARMv7 optee boot arguments. 71# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address. 72# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address. 73# CFG_DT_ADDR: if defined, forces Device Tree data physical address. 74endif 75 76core-platform-cppflags += -I$(arch-dir)/include 77core-platform-subdirs += \ 78 $(addprefix $(arch-dir)/, kernel crypto mm tee pta) $(platform-dir) 79 80ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y) 81core-platform-subdirs += $(arch-dir)/sm 82endif 83 84arm64-platform-cppflags += -DARM64=1 -D__LP64__=1 85arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1 86 87platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe 88platform-aflags-generic ?= -pipe 89 90arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft 91arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations 92arm32-platform-cflags-generic ?= -mthumb -mthumb-interwork \ 93 -fno-short-enums -fno-common -mno-unaligned-access 94arm32-platform-aflags-no-hard-float ?= 95 96arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only 97arm64-platform-cflags-hard-float ?= 98arm64-platform-cflags-generic ?= -mstrict-align 99 100ifeq ($(DEBUG),1) 101# For backwards compatibility 102$(call force,CFG_CC_OPTIMIZE_FOR_SIZE,n) 103$(call force,CFG_DEBUG_INFO,y) 104endif 105 106CFG_CC_OPTIMIZE_FOR_SIZE ?= y 107ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),y) 108platform-cflags-optimization ?= -Os 109else 110platform-cflags-optimization ?= -O0 111endif 112 113CFG_DEBUG_INFO ?= y 114ifeq ($(CFG_DEBUG_INFO),y) 115platform-cflags-debug-info ?= -g3 116platform-aflags-debug-info ?= -g 117endif 118 119core-platform-cflags += $(platform-cflags-optimization) 120core-platform-cflags += $(platform-cflags-generic) 121core-platform-cflags += $(platform-cflags-debug-info) 122 123core-platform-aflags += $(platform-aflags-generic) 124core-platform-aflags += $(platform-aflags-debug-info) 125 126ifeq ($(CFG_ARM64_core),y) 127arch-bits-core := 64 128core-platform-cppflags += $(arm64-platform-cppflags) 129core-platform-cflags += $(arm64-platform-cflags) 130core-platform-cflags += $(arm64-platform-cflags-generic) 131core-platform-cflags += $(arm64-platform-cflags-no-hard-float) 132core-platform-aflags += $(arm64-platform-aflags) 133else 134arch-bits-core := 32 135core-platform-cppflags += $(arm32-platform-cppflags) 136core-platform-cflags += $(arm32-platform-cflags) 137core-platform-cflags += $(arm32-platform-cflags-no-hard-float) 138ifeq ($(CFG_UNWIND),y) 139core-platform-cflags += -funwind-tables 140endif 141core-platform-cflags += $(arm32-platform-cflags-generic) 142core-platform-aflags += $(core_arm32-platform-aflags) 143core-platform-aflags += $(arm32-platform-aflags) 144endif 145 146# Provide default ta-targets if not set by the platform config 147ifeq (,$(ta-targets)) 148ta-targets = ta_arm32 149ifeq ($(CFG_ARM64_core),y) 150ta-targets += ta_arm64 151endif 152endif 153 154ifneq ($(filter ta_arm32,$(ta-targets)),) 155# Variables for ta-target/sm "ta_arm32" 156CFG_ARM32_ta_arm32 := y 157arch-bits-ta_arm32 := 32 158ta_arm32-platform-cppflags += $(arm32-platform-cppflags) 159ta_arm32-platform-cflags += $(arm32-platform-cflags) 160ta_arm32-platform-cflags += $(platform-cflags-optimization) 161ta_arm32-platform-cflags += $(platform-cflags-debug-info) 162ta_arm32-platform-cflags += -fpie 163ta_arm32-platform-cflags += $(arm32-platform-cflags-generic) 164ifeq ($(arm32-platform-hard-float-enabled),y) 165ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float) 166else 167ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float) 168endif 169ifeq ($(CFG_UNWIND),y) 170ta_arm32-platform-cflags += -funwind-tables 171endif 172ta_arm32-platform-aflags += $(platform-aflags-generic) 173ta_arm32-platform-aflags += $(platform-aflags-debug-info) 174ta_arm32-platform-aflags += $(arm32-platform-aflags) 175 176ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32 177ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags 178ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags 179ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags 180 181ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_ 182ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_ 183ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_ 184endif 185 186ifneq ($(filter ta_arm64,$(ta-targets)),) 187# Variables for ta-target/sm "ta_arm64" 188CFG_ARM64_ta_arm64 := y 189arch-bits-ta_arm64 := 64 190ta_arm64-platform-cppflags += $(arm64-platform-cppflags) 191ta_arm64-platform-cflags += $(arm64-platform-cflags) 192ta_arm64-platform-cflags += $(platform-cflags-optimization) 193ta_arm64-platform-cflags += $(platform-cflags-debug-info) 194ta_arm64-platform-cflags += -fpie 195ta_arm64-platform-cflags += $(arm64-platform-cflags-generic) 196ifeq ($(arm64-platform-hard-float-enabled),y) 197ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float) 198else 199ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float) 200endif 201ta_arm64-platform-aflags += $(platform-aflags-generic) 202ta_arm64-platform-aflags += $(platform-aflags-debug-info) 203ta_arm64-platform-aflags += $(arm64-platform-aflags) 204 205ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64 206ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags 207ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags 208ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags 209 210ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_ 211ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_ 212endif 213 214# Set cross compiler prefix for each submodule 215$(foreach sm, core $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm))))) 216 217arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt 218arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h 219arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S 220arm32-sysregs += $(arm32-sysreg-txt) 221 222ifeq ($(CFG_ARM_GICV3),y) 223arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt 224arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h 225arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S 226arm32-sysregs += $(arm32-gicv3-sysreg-txt) 227endif 228 229arm32-sysregs-out := $(out-dir)/$(sm)/include/generated 230 231define process-arm32-sysreg 232FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 233cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 234 235$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py 236 @$(cmd-echo-silent) ' GEN $$@' 237 $(q)mkdir -p $$(dir $$@) 238 $(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \ 239 < $$< > $$@ 240 241FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 242cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 243 244$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py 245 @$(cmd-echo-silent) ' GEN $$@' 246 $(q)mkdir -p $$(dir $$@) 247 $(q)scripts/arm32_sysreg.py --s_file < $$< > $$@ 248endef #process-arm32-sysreg 249 250$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr)))) 251