1# Setup compiler for the core module 2ifeq ($(CFG_ARM64_core),y) 3arch-bits-core := 64 4else 5arch-bits-core := 32 6endif 7CROSS_COMPILE_core := $(CROSS_COMPILE$(arch-bits-core)) 8COMPILER_core := $(COMPILER) 9include mk/$(COMPILER_core).mk 10 11# Defines the cc-option macro using the compiler set for the core module 12include mk/cc-option.mk 13 14# Size of emulated TrustZone protected SRAM, 448 kB. 15# Only applicable when paging is enabled. 16CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752 17 18ifneq ($(CFG_LPAE_ADDR_SPACE_SIZE),) 19$(warning Error: CFG_LPAE_ADDR_SPACE_SIZE is not supported any longer) 20$(error Error: Please use CFG_LPAE_ADDR_SPACE_BITS instead) 21endif 22 23CFG_LPAE_ADDR_SPACE_BITS ?= 32 24 25CFG_MMAP_REGIONS ?= 13 26CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10) 27 28ifeq ($(CFG_ARM64_core),y) 29CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64 30CFG_KERN_LINKER_ARCH ?= aarch64 31# TCR_EL1.IPS needs to be initialized according to the largest physical 32# address that we need to map. 33# Physical address size 34# 32 bits, 4GB. 35# 36 bits, 64GB. 36# (etc.) 37CFG_CORE_ARM64_PA_BITS ?= 32 38else 39ifeq ($(CFG_ARM32_core),y) 40CFG_KERN_LINKER_FORMAT ?= elf32-littlearm 41CFG_KERN_LINKER_ARCH ?= arm 42else 43$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined) 44endif 45endif 46 47ifeq ($(CFG_TA_FLOAT_SUPPORT),y) 48# Use hard-float for floating point support in user TAs instead of 49# soft-float 50CFG_WITH_VFP ?= y 51ifeq ($(CFG_ARM64_core),y) 52# AArch64 has no fallback to soft-float 53$(call force,CFG_WITH_VFP,y) 54endif 55ifeq ($(CFG_WITH_VFP),y) 56arm64-platform-hard-float-enabled := y 57ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y) 58arm32-platform-hard-float-enabled := y 59endif 60endif 61endif 62 63# Adds protection against CVE-2017-5715 also know as Spectre 64# (https://spectreattack.com) 65# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf 66# Variant 2 67CFG_CORE_WORKAROUND_SPECTRE_BP ?= y 68# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from 69# secure EL0 instead of non-secure world. 70CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP) 71 72# Adds protection against a tool like Cachegrab 73# (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts 74# to prime and later analyze the L1D, L1I and BTB caches to gain 75# information from secure world execution. 76CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME ?= y 77ifeq ($(CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME),y) 78$(call force,CFG_CORE_WORKAROUND_SPECTRE_BP,y,Required by CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME) 79endif 80 81CFG_CORE_RWDATA_NOEXEC ?= y 82CFG_CORE_RODATA_NOEXEC ?= n 83ifeq ($(CFG_CORE_RODATA_NOEXEC),y) 84$(call force,CFG_CORE_RWDATA_NOEXEC,y) 85endif 86# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it 87CFG_SCTLR_ALIGNMENT_CHECK ?= n 88 89ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y) 90$(call force,CFG_WITH_LPAE,y) 91endif 92 93# SPMC configuration "S-EL1 SPMC" where SPM Core is implemented at S-EL1, 94# that is, OP-TEE. 95# Note that this is an experimental feature, ABIs etc may have incompatible 96# changes 97ifeq ($(CFG_CORE_SEL1_SPMC),y) 98$(call force,CFG_CORE_FFA,y) 99endif 100 101# Unmaps all kernel mode code except the code needed to take exceptions 102# from user space and restore kernel mode mapping again. This gives more 103# strict control over what is accessible while in user mode. 104# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75 105CFG_CORE_UNMAP_CORE_AT_EL0 ?= y 106 107# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and 108# save/restore PMCR during world switch. 109CFG_SM_NO_CYCLE_COUNTING ?= y 110 111ifeq ($(CFG_ARM32_core),y) 112# Configration directive related to ARMv7 optee boot arguments. 113# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address. 114# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address. 115# CFG_DT_ADDR: if defined, forces Device Tree data physical address. 116endif 117 118core-platform-cppflags += -I$(arch-dir)/include 119core-platform-subdirs += \ 120 $(addprefix $(arch-dir)/, kernel crypto mm tee) $(platform-dir) 121 122ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y) 123core-platform-subdirs += $(arch-dir)/sm 124endif 125 126arm64-platform-cppflags += -DARM64=1 -D__LP64__=1 127arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1 128 129platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe 130platform-aflags-generic ?= -pipe 131 132arm32-platform-aflags += -marm 133 134arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft 135arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations 136arm32-platform-cflags-generic-thumb ?= -mthumb \ 137 -fno-short-enums -fno-common -mno-unaligned-access 138arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \ 139 -fno-short-enums -fno-common -mno-unaligned-access 140arm32-platform-aflags-no-hard-float ?= 141 142arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only 143arm64-platform-cflags-hard-float ?= 144arm64-platform-cflags-generic := -mstrict-align $(call cc-option,-mno-outline-atomics,) 145 146ifeq ($(DEBUG),1) 147# For backwards compatibility 148$(call force,CFG_CC_OPT_LEVEL,0) 149$(call force,CFG_DEBUG_INFO,y) 150endif 151ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),n) 152# For backwards compatibility 153$(call force,CFG_CC_OPT_LEVEL,0) 154endif 155 156# Optimize for size by default, usually gives good performance too 157CFG_CC_OPT_LEVEL ?= s 158platform-cflags-optimization ?= -O$(CFG_CC_OPT_LEVEL) 159 160CFG_DEBUG_INFO ?= y 161ifeq ($(CFG_DEBUG_INFO),y) 162platform-cflags-debug-info ?= -g3 163platform-aflags-debug-info ?= -g 164endif 165 166core-platform-cflags += $(platform-cflags-optimization) 167core-platform-cflags += $(platform-cflags-generic) 168core-platform-cflags += $(platform-cflags-debug-info) 169 170core-platform-aflags += $(platform-aflags-generic) 171core-platform-aflags += $(platform-aflags-debug-info) 172 173ifeq ($(CFG_CORE_ASLR),y) 174core-platform-cflags += -fpie 175endif 176 177ifeq ($(CFG_ARM64_core),y) 178core-platform-cppflags += $(arm64-platform-cppflags) 179core-platform-cflags += $(arm64-platform-cflags) 180core-platform-cflags += $(arm64-platform-cflags-generic) 181core-platform-cflags += $(arm64-platform-cflags-no-hard-float) 182core-platform-aflags += $(arm64-platform-aflags) 183else 184core-platform-cppflags += $(arm32-platform-cppflags) 185core-platform-cflags += $(arm32-platform-cflags) 186core-platform-cflags += $(arm32-platform-cflags-no-hard-float) 187ifeq ($(CFG_UNWIND),y) 188core-platform-cflags += -funwind-tables 189endif 190ifeq ($(CFG_SYSCALL_FTRACE),y) 191core-platform-cflags += $(arm32-platform-cflags-generic-arm) 192else 193core-platform-cflags += $(arm32-platform-cflags-generic-thumb) 194endif 195core-platform-aflags += $(core_arm32-platform-aflags) 196core-platform-aflags += $(arm32-platform-aflags) 197endif 198 199# Provide default supported-ta-targets if not set by the platform config 200ifeq (,$(supported-ta-targets)) 201supported-ta-targets = ta_arm32 202ifeq ($(CFG_ARM64_core),y) 203supported-ta-targets += ta_arm64 204endif 205endif 206 207ta-targets := $(if $(CFG_USER_TA_TARGETS),$(filter $(supported-ta-targets),$(CFG_USER_TA_TARGETS)),$(supported-ta-targets)) 208unsup-targets := $(filter-out $(ta-targets),$(CFG_USER_TA_TARGETS)) 209ifneq (,$(unsup-targets)) 210$(error CFG_USER_TA_TARGETS contains unsupported value(s): $(unsup-targets). Valid values: $(supported-ta-targets)) 211endif 212 213ifneq ($(filter ta_arm32,$(ta-targets)),) 214# Variables for ta-target/sm "ta_arm32" 215CFG_ARM32_ta_arm32 := y 216arch-bits-ta_arm32 := 32 217ta_arm32-platform-cppflags += $(arm32-platform-cppflags) 218ta_arm32-platform-cflags += $(arm32-platform-cflags) 219ta_arm32-platform-cflags += $(platform-cflags-optimization) 220ta_arm32-platform-cflags += $(platform-cflags-debug-info) 221ta_arm32-platform-cflags += -fpic 222 223# Thumb mode doesn't support function graph tracing due to missing 224# frame pointer support required to trace function call chain. So 225# rather compile in ARM mode if function tracing is enabled. 226ifeq ($(CFG_FTRACE_SUPPORT),y) 227ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm) 228else 229ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-thumb) 230endif 231 232ifeq ($(arm32-platform-hard-float-enabled),y) 233ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float) 234else 235ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float) 236endif 237ifeq ($(CFG_UNWIND),y) 238ta_arm32-platform-cflags += -funwind-tables 239endif 240ta_arm32-platform-aflags += $(platform-aflags-generic) 241ta_arm32-platform-aflags += $(platform-aflags-debug-info) 242ta_arm32-platform-aflags += $(arm32-platform-aflags) 243 244ta_arm32-platform-cxxflags += -fpic 245ta_arm32-platform-cxxflags += $(arm32-platform-cxxflags) 246ta_arm32-platform-cxxflags += $(platform-cflags-optimization) 247ta_arm32-platform-cxxflags += $(platform-cflags-debug-info) 248 249ifeq ($(arm32-platform-hard-float-enabled),y) 250ta_arm32-platform-cxxflags += $(arm32-platform-cflags-hard-float) 251else 252ta_arm32-platform-cxxflags += $(arm32-platform-cflags-no-hard-float) 253endif 254 255ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32 256ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags 257ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags 258ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags 259ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cxxflags 260 261ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_ 262ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_ 263ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_ 264ta-mk-file-export-add-ta_arm32 += COMPILER ?= gcc_nl_ 265ta-mk-file-export-add-ta_arm32 += COMPILER_ta_arm32 ?= $$(COMPILER)_nl_ 266ta-mk-file-export-add-ta_arm32 += PYTHON3 ?= python3_nl_ 267endif 268 269ifneq ($(filter ta_arm64,$(ta-targets)),) 270# Variables for ta-target/sm "ta_arm64" 271CFG_ARM64_ta_arm64 := y 272arch-bits-ta_arm64 := 64 273ta_arm64-platform-cppflags += $(arm64-platform-cppflags) 274ta_arm64-platform-cflags += $(arm64-platform-cflags) 275ta_arm64-platform-cflags += $(platform-cflags-optimization) 276ta_arm64-platform-cflags += $(platform-cflags-debug-info) 277ta_arm64-platform-cflags += -fpic 278ta_arm64-platform-cflags += $(arm64-platform-cflags-generic) 279ifeq ($(arm64-platform-hard-float-enabled),y) 280ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float) 281else 282ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float) 283endif 284ta_arm64-platform-aflags += $(platform-aflags-generic) 285ta_arm64-platform-aflags += $(platform-aflags-debug-info) 286ta_arm64-platform-aflags += $(arm64-platform-aflags) 287 288ta_arm64-platform-cxxflags += -fpic 289ta_arm64-platform-cxxflags += $(platform-cflags-optimization) 290ta_arm64-platform-cxxflags += $(platform-cflags-debug-info) 291 292ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64 293ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags 294ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags 295ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags 296ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cxxflags 297 298ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_ 299ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_ 300ta-mk-file-export-add-ta_arm64 += COMPILER ?= gcc_nl_ 301ta-mk-file-export-add-ta_arm64 += COMPILER_ta_arm64 ?= $$(COMPILER)_nl_ 302ta-mk-file-export-add-ta_arm64 += PYTHON3 ?= python3_nl_ 303endif 304 305# Set cross compiler prefix for each TA target 306$(foreach sm, $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm))))) 307 308arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt 309arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h 310arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S 311arm32-sysregs += $(arm32-sysreg-txt) 312 313ifeq ($(CFG_ARM_GICV3),y) 314arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt 315arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h 316arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S 317arm32-sysregs += $(arm32-gicv3-sysreg-txt) 318endif 319 320arm32-sysregs-out := $(out-dir)/$(sm)/include/generated 321 322define process-arm32-sysreg 323FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 324cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 325 326$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py 327 @$(cmd-echo-silent) ' GEN $$@' 328 $(q)mkdir -p $$(dir $$@) 329 $(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \ 330 < $$< > $$@ 331 332FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 333cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 334 335$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py 336 @$(cmd-echo-silent) ' GEN $$@' 337 $(q)mkdir -p $$(dir $$@) 338 $(q)scripts/arm32_sysreg.py --s_file < $$< > $$@ 339endef #process-arm32-sysreg 340 341$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr)))) 342