1# Setup compiler for the core module 2ifeq ($(CFG_ARM64_core),y) 3arch-bits-core := 64 4else 5arch-bits-core := 32 6endif 7CROSS_COMPILE_core := $(CROSS_COMPILE$(arch-bits-core)) 8COMPILER_core := $(COMPILER) 9include mk/$(COMPILER_core).mk 10 11# Defines the cc-option macro using the compiler set for the core module 12include mk/cc-option.mk 13 14CFG_LTC_OPTEE_THREAD ?= y 15# Size of emulated TrustZone protected SRAM, 448 kB. 16# Only applicable when paging is enabled. 17CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752 18CFG_LPAE_ADDR_SPACE_SIZE ?= (1ull << 32) 19 20CFG_MMAP_REGIONS ?= 13 21CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10) 22 23ifeq ($(CFG_ARM64_core),y) 24CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64 25CFG_KERN_LINKER_ARCH ?= aarch64 26# TCR_EL1.IPS needs to be initialized according to the largest physical 27# address that we need to map. 28# Physical address size 29# 32 bits, 4GB. 30# 36 bits, 64GB. 31# (etc.) 32CFG_CORE_ARM64_PA_BITS ?= 32 33else 34ifeq ($(CFG_ARM32_core),y) 35CFG_KERN_LINKER_FORMAT ?= elf32-littlearm 36CFG_KERN_LINKER_ARCH ?= arm 37else 38$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined) 39endif 40endif 41 42ifeq ($(CFG_TA_FLOAT_SUPPORT),y) 43# Use hard-float for floating point support in user TAs instead of 44# soft-float 45CFG_WITH_VFP ?= y 46ifeq ($(CFG_ARM64_core),y) 47# AArch64 has no fallback to soft-float 48$(call force,CFG_WITH_VFP,y) 49endif 50ifeq ($(CFG_WITH_VFP),y) 51arm64-platform-hard-float-enabled := y 52ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y) 53arm32-platform-hard-float-enabled := y 54endif 55endif 56endif 57 58# Adds protection against CVE-2017-5715 also know as Spectre 59# (https://spectreattack.com) 60# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf 61# Variant 2 62CFG_CORE_WORKAROUND_SPECTRE_BP ?= y 63# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from 64# secure EL0 instead of non-secure world. 65CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP) 66 67# Adds protection against a tool like Cachegrab 68# (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts 69# to prime and later analyze the L1D, L1I and BTB caches to gain 70# information from secure world execution. 71CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME ?= y 72ifeq ($(CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME),y) 73$(call force,CFG_CORE_WORKAROUND_SPECTRE_BP,y,Required by CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME) 74endif 75 76CFG_CORE_RWDATA_NOEXEC ?= y 77CFG_CORE_RODATA_NOEXEC ?= n 78ifeq ($(CFG_CORE_RODATA_NOEXEC),y) 79$(call force,CFG_CORE_RWDATA_NOEXEC,y) 80endif 81# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it 82CFG_SCTLR_ALIGNMENT_CHECK ?= n 83 84ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y) 85$(call force,CFG_WITH_LPAE,y) 86endif 87 88# Unmaps all kernel mode code except the code needed to take exceptions 89# from user space and restore kernel mode mapping again. This gives more 90# strict control over what is accessible while in user mode. 91# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75 92CFG_CORE_UNMAP_CORE_AT_EL0 ?= y 93 94# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and 95# save/restore PMCR during world switch. 96CFG_SM_NO_CYCLE_COUNTING ?= y 97 98ifeq ($(CFG_ARM32_core),y) 99# Configration directive related to ARMv7 optee boot arguments. 100# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address. 101# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address. 102# CFG_DT_ADDR: if defined, forces Device Tree data physical address. 103endif 104 105core-platform-cppflags += -I$(arch-dir)/include 106core-platform-subdirs += \ 107 $(addprefix $(arch-dir)/, kernel crypto mm tee) $(platform-dir) 108 109ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y) 110core-platform-subdirs += $(arch-dir)/sm 111endif 112 113arm64-platform-cppflags += -DARM64=1 -D__LP64__=1 114arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1 115 116platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe 117platform-aflags-generic ?= -pipe 118 119arm32-platform-aflags += -marm 120 121arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft 122arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations 123arm32-platform-cflags-generic-thumb ?= -mthumb \ 124 -fno-short-enums -fno-common -mno-unaligned-access 125arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \ 126 -fno-short-enums -fno-common -mno-unaligned-access 127arm32-platform-aflags-no-hard-float ?= 128 129arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only 130arm64-platform-cflags-hard-float ?= 131arm64-platform-cflags-generic := -mstrict-align $(call cc-option,-mno-outline-atomics,) 132 133ifeq ($(DEBUG),1) 134# For backwards compatibility 135$(call force,CFG_CC_OPTIMIZE_FOR_SIZE,n) 136$(call force,CFG_DEBUG_INFO,y) 137endif 138 139CFG_CC_OPTIMIZE_FOR_SIZE ?= y 140ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),y) 141platform-cflags-optimization ?= -Os 142else 143platform-cflags-optimization ?= -O0 144endif 145 146CFG_DEBUG_INFO ?= y 147ifeq ($(CFG_DEBUG_INFO),y) 148platform-cflags-debug-info ?= -g3 149platform-aflags-debug-info ?= -g 150endif 151 152core-platform-cflags += $(platform-cflags-optimization) 153core-platform-cflags += $(platform-cflags-generic) 154core-platform-cflags += $(platform-cflags-debug-info) 155 156core-platform-aflags += $(platform-aflags-generic) 157core-platform-aflags += $(platform-aflags-debug-info) 158 159ifeq ($(CFG_CORE_ASLR),y) 160core-platform-cflags += -fpie 161endif 162 163ifeq ($(CFG_ARM64_core),y) 164core-platform-cppflags += $(arm64-platform-cppflags) 165core-platform-cflags += $(arm64-platform-cflags) 166core-platform-cflags += $(arm64-platform-cflags-generic) 167core-platform-cflags += $(arm64-platform-cflags-no-hard-float) 168core-platform-aflags += $(arm64-platform-aflags) 169else 170core-platform-cppflags += $(arm32-platform-cppflags) 171core-platform-cflags += $(arm32-platform-cflags) 172core-platform-cflags += $(arm32-platform-cflags-no-hard-float) 173ifeq ($(CFG_UNWIND),y) 174core-platform-cflags += -funwind-tables 175endif 176ifeq ($(CFG_SYSCALL_FTRACE),y) 177core-platform-cflags += $(arm32-platform-cflags-generic-arm) 178else 179core-platform-cflags += $(arm32-platform-cflags-generic-thumb) 180endif 181core-platform-aflags += $(core_arm32-platform-aflags) 182core-platform-aflags += $(arm32-platform-aflags) 183endif 184 185# Provide default supported-ta-targets if not set by the platform config 186ifeq (,$(supported-ta-targets)) 187supported-ta-targets = ta_arm32 188ifeq ($(CFG_ARM64_core),y) 189supported-ta-targets += ta_arm64 190endif 191endif 192 193ta-targets := $(if $(CFG_USER_TA_TARGETS),$(filter $(supported-ta-targets),$(CFG_USER_TA_TARGETS)),$(supported-ta-targets)) 194unsup-targets := $(filter-out $(ta-targets),$(CFG_USER_TA_TARGETS)) 195ifneq (,$(unsup-targets)) 196$(error CFG_USER_TA_TARGETS contains unsupported value(s): $(unsup-targets). Valid values: $(supported-ta-targets)) 197endif 198 199ifneq ($(filter ta_arm32,$(ta-targets)),) 200# Variables for ta-target/sm "ta_arm32" 201CFG_ARM32_ta_arm32 := y 202arch-bits-ta_arm32 := 32 203ta_arm32-platform-cppflags += $(arm32-platform-cppflags) 204ta_arm32-platform-cflags += $(arm32-platform-cflags) 205ta_arm32-platform-cflags += $(platform-cflags-optimization) 206ta_arm32-platform-cflags += $(platform-cflags-debug-info) 207ta_arm32-platform-cflags += -fpic 208 209# Thumb mode doesn't support function graph tracing due to missing 210# frame pointer support required to trace function call chain. So 211# rather compile in ARM mode if function tracing is enabled. 212ifeq ($(CFG_FTRACE_SUPPORT),y) 213ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm) 214else 215ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-thumb) 216endif 217 218ifeq ($(arm32-platform-hard-float-enabled),y) 219ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float) 220else 221ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float) 222endif 223ifeq ($(CFG_UNWIND),y) 224ta_arm32-platform-cflags += -funwind-tables 225endif 226ta_arm32-platform-aflags += $(platform-aflags-generic) 227ta_arm32-platform-aflags += $(platform-aflags-debug-info) 228ta_arm32-platform-aflags += $(arm32-platform-aflags) 229 230ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32 231ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags 232ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags 233ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags 234 235ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_ 236ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_ 237ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_ 238ta-mk-file-export-add-ta_arm32 += COMPILER ?= gcc_nl_ 239ta-mk-file-export-add-ta_arm32 += COMPILER_ta_arm32 ?= $$(COMPILER)_nl_ 240endif 241 242ifneq ($(filter ta_arm64,$(ta-targets)),) 243# Variables for ta-target/sm "ta_arm64" 244CFG_ARM64_ta_arm64 := y 245arch-bits-ta_arm64 := 64 246ta_arm64-platform-cppflags += $(arm64-platform-cppflags) 247ta_arm64-platform-cflags += $(arm64-platform-cflags) 248ta_arm64-platform-cflags += $(platform-cflags-optimization) 249ta_arm64-platform-cflags += $(platform-cflags-debug-info) 250ta_arm64-platform-cflags += -fpic 251ta_arm64-platform-cflags += $(arm64-platform-cflags-generic) 252ifeq ($(arm64-platform-hard-float-enabled),y) 253ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float) 254else 255ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float) 256endif 257ta_arm64-platform-aflags += $(platform-aflags-generic) 258ta_arm64-platform-aflags += $(platform-aflags-debug-info) 259ta_arm64-platform-aflags += $(arm64-platform-aflags) 260 261ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64 262ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags 263ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags 264ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags 265 266ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_ 267ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_ 268ta-mk-file-export-add-ta_arm64 += COMPILER ?= gcc_nl_ 269ta-mk-file-export-add-ta_arm64 += COMPILER_ta_arm64 ?= $$(COMPILER)_nl_ 270endif 271 272# Set cross compiler prefix for each TA target 273$(foreach sm, $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm))))) 274 275arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt 276arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h 277arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S 278arm32-sysregs += $(arm32-sysreg-txt) 279 280ifeq ($(CFG_ARM_GICV3),y) 281arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt 282arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h 283arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S 284arm32-sysregs += $(arm32-gicv3-sysreg-txt) 285endif 286 287arm32-sysregs-out := $(out-dir)/$(sm)/include/generated 288 289define process-arm32-sysreg 290FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 291cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 292 293$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py 294 @$(cmd-echo-silent) ' GEN $$@' 295 $(q)mkdir -p $$(dir $$@) 296 $(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \ 297 < $$< > $$@ 298 299FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 300cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 301 302$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py 303 @$(cmd-echo-silent) ' GEN $$@' 304 $(q)mkdir -p $$(dir $$@) 305 $(q)scripts/arm32_sysreg.py --s_file < $$< > $$@ 306endef #process-arm32-sysreg 307 308$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr)))) 309