1CFG_LTC_OPTEE_THREAD ?= y 2# Size of emulated TrustZone protected SRAM, 448 kB. 3# Only applicable when paging is enabled. 4CFG_CORE_TZSRAM_EMUL_SIZE ?= 458752 5CFG_LPAE_ADDR_SPACE_SIZE ?= (1ull << 32) 6 7CFG_MMAP_REGIONS ?= 13 8CFG_RESERVED_VASPACE_SIZE ?= (1024 * 1024 * 10) 9 10ifeq ($(CFG_ARM64_core),y) 11CFG_KERN_LINKER_FORMAT ?= elf64-littleaarch64 12CFG_KERN_LINKER_ARCH ?= aarch64 13else 14ifeq ($(CFG_ARM32_core),y) 15CFG_KERN_LINKER_FORMAT ?= elf32-littlearm 16CFG_KERN_LINKER_ARCH ?= arm 17else 18$(error Error: CFG_ARM64_core or CFG_ARM32_core should be defined) 19endif 20endif 21 22ifeq ($(CFG_TA_FLOAT_SUPPORT),y) 23# Use hard-float for floating point support in user TAs instead of 24# soft-float 25CFG_WITH_VFP ?= y 26ifeq ($(CFG_ARM64_core),y) 27# AArch64 has no fallback to soft-float 28$(call force,CFG_WITH_VFP,y) 29endif 30ifeq ($(CFG_WITH_VFP),y) 31arm64-platform-hard-float-enabled := y 32ifneq ($(CFG_TA_ARM32_NO_HARD_FLOAT_SUPPORT),y) 33arm32-platform-hard-float-enabled := y 34endif 35endif 36endif 37 38# Adds protection against CVE-2017-5715 also know as Spectre 39# (https://spectreattack.com) 40# See also https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf 41# Variant 2 42CFG_CORE_WORKAROUND_SPECTRE_BP ?= y 43# Same as CFG_CORE_WORKAROUND_SPECTRE_BP but targeting exceptions from 44# secure EL0 instead of non-secure world. 45CFG_CORE_WORKAROUND_SPECTRE_BP_SEC ?= $(CFG_CORE_WORKAROUND_SPECTRE_BP) 46 47# Adds protection against a tool like Cachegrab 48# (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts 49# to prime and later analyze the L1D, L1I and BTB caches to gain 50# information from secure world execution. 51CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME ?= y 52ifeq ($(CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME),y) 53$(call force,CFG_CORE_WORKAROUND_SPECTRE_BP,y,Required by CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME) 54endif 55 56CFG_CORE_RWDATA_NOEXEC ?= y 57CFG_CORE_RODATA_NOEXEC ?= n 58ifeq ($(CFG_CORE_RODATA_NOEXEC),y) 59$(call force,CFG_CORE_RWDATA_NOEXEC,y) 60endif 61# 'y' to set the Alignment Check Enable bit in SCTLR/SCTLR_EL1, 'n' to clear it 62CFG_SCTLR_ALIGNMENT_CHECK ?= y 63 64ifeq ($(CFG_CORE_LARGE_PHYS_ADDR),y) 65$(call force,CFG_WITH_LPAE,y) 66endif 67 68# Unmaps all kernel mode code except the code needed to take exceptions 69# from user space and restore kernel mode mapping again. This gives more 70# strict control over what is accessible while in user mode. 71# Addresses CVE-2017-5715 (aka Meltdown) known to affect Arm Cortex-A75 72CFG_CORE_UNMAP_CORE_AT_EL0 ?= y 73 74# Initialize PMCR.DP to 1 to prohibit cycle counting in secure state, and 75# save/restore PMCR during world switch. 76CFG_SM_NO_CYCLE_COUNTING ?= y 77 78ifeq ($(CFG_ARM32_core),y) 79# Configration directive related to ARMv7 optee boot arguments. 80# CFG_PAGEABLE_ADDR: if defined, forces pageable data physical address. 81# CFG_NS_ENTRY_ADDR: if defined, forces NS World physical entry address. 82# CFG_DT_ADDR: if defined, forces Device Tree data physical address. 83endif 84 85core-platform-cppflags += -I$(arch-dir)/include 86core-platform-subdirs += \ 87 $(addprefix $(arch-dir)/, kernel crypto mm tee) $(platform-dir) 88 89ifneq ($(CFG_WITH_ARM_TRUSTED_FW),y) 90core-platform-subdirs += $(arch-dir)/sm 91endif 92 93arm64-platform-cppflags += -DARM64=1 -D__LP64__=1 94arm32-platform-cppflags += -DARM32=1 -D__ILP32__=1 95 96platform-cflags-generic ?= -ffunction-sections -fdata-sections -pipe 97platform-aflags-generic ?= -pipe 98 99arm32-platform-cflags-no-hard-float ?= -mfloat-abi=soft 100arm32-platform-cflags-hard-float ?= -mfloat-abi=hard -funsafe-math-optimizations 101arm32-platform-cflags-generic-thumb ?= -mthumb \ 102 -fno-short-enums -fno-common -mno-unaligned-access 103arm32-platform-cflags-generic-arm ?= -marm -fno-omit-frame-pointer -mapcs \ 104 -fno-short-enums -fno-common -mno-unaligned-access 105arm32-platform-aflags-no-hard-float ?= 106 107arm64-platform-cflags-no-hard-float ?= -mgeneral-regs-only 108arm64-platform-cflags-hard-float ?= 109arm64-platform-cflags-generic ?= -mstrict-align 110 111ifeq ($(DEBUG),1) 112# For backwards compatibility 113$(call force,CFG_CC_OPTIMIZE_FOR_SIZE,n) 114$(call force,CFG_DEBUG_INFO,y) 115endif 116 117CFG_CC_OPTIMIZE_FOR_SIZE ?= y 118ifeq ($(CFG_CC_OPTIMIZE_FOR_SIZE),y) 119platform-cflags-optimization ?= -Os 120else 121platform-cflags-optimization ?= -O0 122endif 123 124CFG_DEBUG_INFO ?= y 125ifeq ($(CFG_DEBUG_INFO),y) 126platform-cflags-debug-info ?= -g3 127platform-aflags-debug-info ?= -g 128endif 129 130core-platform-cflags += $(platform-cflags-optimization) 131core-platform-cflags += $(platform-cflags-generic) 132core-platform-cflags += $(platform-cflags-debug-info) 133 134core-platform-aflags += $(platform-aflags-generic) 135core-platform-aflags += $(platform-aflags-debug-info) 136 137ifeq ($(CFG_ARM64_core),y) 138arch-bits-core := 64 139core-platform-cppflags += $(arm64-platform-cppflags) 140core-platform-cflags += $(arm64-platform-cflags) 141core-platform-cflags += $(arm64-platform-cflags-generic) 142core-platform-cflags += $(arm64-platform-cflags-no-hard-float) 143core-platform-aflags += $(arm64-platform-aflags) 144else 145arch-bits-core := 32 146core-platform-cppflags += $(arm32-platform-cppflags) 147core-platform-cflags += $(arm32-platform-cflags) 148core-platform-cflags += $(arm32-platform-cflags-no-hard-float) 149ifeq ($(CFG_UNWIND),y) 150core-platform-cflags += -funwind-tables 151endif 152ifeq ($(CFG_SYSCALL_FTRACE),y) 153core-platform-cflags += $(arm32-platform-cflags-generic-arm) 154else 155core-platform-cflags += $(arm32-platform-cflags-generic-thumb) 156endif 157core-platform-aflags += $(core_arm32-platform-aflags) 158core-platform-aflags += $(arm32-platform-aflags) 159endif 160 161# Provide default supported-ta-targets if not set by the platform config 162ifeq (,$(supported-ta-targets)) 163supported-ta-targets = ta_arm32 164ifeq ($(CFG_ARM64_core),y) 165supported-ta-targets += ta_arm64 166endif 167endif 168 169ta-targets := $(if $(CFG_USER_TA_TARGETS),$(filter $(supported-ta-targets),$(CFG_USER_TA_TARGETS)),$(supported-ta-targets)) 170unsup-targets := $(filter-out $(ta-targets),$(CFG_USER_TA_TARGETS)) 171ifneq (,$(unsup-targets)) 172$(error CFG_USER_TA_TARGETS contains unsupported value(s): $(unsup-targets). Valid values: $(supported-ta-targets)) 173endif 174 175ifneq ($(filter ta_arm32,$(ta-targets)),) 176# Variables for ta-target/sm "ta_arm32" 177CFG_ARM32_ta_arm32 := y 178arch-bits-ta_arm32 := 32 179ta_arm32-platform-cppflags += $(arm32-platform-cppflags) 180ta_arm32-platform-cflags += $(arm32-platform-cflags) 181ta_arm32-platform-cflags += $(platform-cflags-optimization) 182ta_arm32-platform-cflags += $(platform-cflags-debug-info) 183ta_arm32-platform-cflags += -fpic 184 185# Thumb mode doesn't support function graph tracing due to missing 186# frame pointer support required to trace function call chain. So 187# rather compile in ARM mode if function tracing is enabled. 188ifeq ($(CFG_FTRACE_SUPPORT),y) 189ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-arm) 190else 191ta_arm32-platform-cflags += $(arm32-platform-cflags-generic-thumb) 192endif 193 194ifeq ($(arm32-platform-hard-float-enabled),y) 195ta_arm32-platform-cflags += $(arm32-platform-cflags-hard-float) 196else 197ta_arm32-platform-cflags += $(arm32-platform-cflags-no-hard-float) 198endif 199ifeq ($(CFG_UNWIND),y) 200ta_arm32-platform-cflags += -funwind-tables 201endif 202ta_arm32-platform-aflags += $(platform-aflags-generic) 203ta_arm32-platform-aflags += $(platform-aflags-debug-info) 204ta_arm32-platform-aflags += $(arm32-platform-aflags) 205 206ta-mk-file-export-vars-ta_arm32 += CFG_ARM32_ta_arm32 207ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cppflags 208ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-cflags 209ta-mk-file-export-vars-ta_arm32 += ta_arm32-platform-aflags 210 211ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE ?= arm-linux-gnueabihf-_nl_ 212ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_ 213ta-mk-file-export-add-ta_arm32 += CROSS_COMPILE_ta_arm32 ?= $$(CROSS_COMPILE32)_nl_ 214ta-mk-file-export-add-ta_arm32 += COMPILER ?= gcc_nl_ 215ta-mk-file-export-add-ta_arm32 += COMPILER_ta_arm32 ?= $$(COMPILER)_nl_ 216endif 217 218ifneq ($(filter ta_arm64,$(ta-targets)),) 219# Variables for ta-target/sm "ta_arm64" 220CFG_ARM64_ta_arm64 := y 221arch-bits-ta_arm64 := 64 222ta_arm64-platform-cppflags += $(arm64-platform-cppflags) 223ta_arm64-platform-cflags += $(arm64-platform-cflags) 224ta_arm64-platform-cflags += $(platform-cflags-optimization) 225ta_arm64-platform-cflags += $(platform-cflags-debug-info) 226ta_arm64-platform-cflags += -fpic 227ta_arm64-platform-cflags += $(arm64-platform-cflags-generic) 228ifeq ($(arm64-platform-hard-float-enabled),y) 229ta_arm64-platform-cflags += $(arm64-platform-cflags-hard-float) 230else 231ta_arm64-platform-cflags += $(arm64-platform-cflags-no-hard-float) 232endif 233ta_arm64-platform-aflags += $(platform-aflags-generic) 234ta_arm64-platform-aflags += $(platform-aflags-debug-info) 235ta_arm64-platform-aflags += $(arm64-platform-aflags) 236 237ta-mk-file-export-vars-ta_arm64 += CFG_ARM64_ta_arm64 238ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cppflags 239ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-cflags 240ta-mk-file-export-vars-ta_arm64 += ta_arm64-platform-aflags 241 242ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_ 243ta-mk-file-export-add-ta_arm64 += CROSS_COMPILE_ta_arm64 ?= $$(CROSS_COMPILE64)_nl_ 244ta-mk-file-export-add-ta_arm64 += COMPILER ?= gcc_nl_ 245ta-mk-file-export-add-ta_arm64 += COMPILER_ta_arm64 ?= $$(COMPILER)_nl_ 246endif 247 248# Set cross compiler prefix for each submodule 249$(foreach sm, core $(ta-targets), $(eval CROSS_COMPILE_$(sm) ?= $(CROSS_COMPILE$(arch-bits-$(sm))))) 250 251arm32-sysreg-txt = core/arch/arm/kernel/arm32_sysreg.txt 252arm32-sysregs-$(arm32-sysreg-txt)-h := arm32_sysreg.h 253arm32-sysregs-$(arm32-sysreg-txt)-s := arm32_sysreg.S 254arm32-sysregs += $(arm32-sysreg-txt) 255 256ifeq ($(CFG_ARM_GICV3),y) 257arm32-gicv3-sysreg-txt = core/arch/arm/kernel/arm32_gicv3_sysreg.txt 258arm32-sysregs-$(arm32-gicv3-sysreg-txt)-h := arm32_gicv3_sysreg.h 259arm32-sysregs-$(arm32-gicv3-sysreg-txt)-s := arm32_gicv3_sysreg.S 260arm32-sysregs += $(arm32-gicv3-sysreg-txt) 261endif 262 263arm32-sysregs-out := $(out-dir)/$(sm)/include/generated 264 265define process-arm32-sysreg 266FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 267cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h) 268 269$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-h): $(1) scripts/arm32_sysreg.py 270 @$(cmd-echo-silent) ' GEN $$@' 271 $(q)mkdir -p $$(dir $$@) 272 $(q)scripts/arm32_sysreg.py --guard __$$(arm32-sysregs-$(1)-h) \ 273 < $$< > $$@ 274 275FORCE-GENSRC$(sm): $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 276cleanfiles := $$(cleanfiles) $$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s) 277 278$$(arm32-sysregs-out)/$$(arm32-sysregs-$(1)-s): $(1) scripts/arm32_sysreg.py 279 @$(cmd-echo-silent) ' GEN $$@' 280 $(q)mkdir -p $$(dir $$@) 281 $(q)scripts/arm32_sysreg.py --s_file < $$< > $$@ 282endef #process-arm32-sysreg 283 284$(foreach sr, $(arm32-sysregs), $(eval $(call process-arm32-sysreg,$(sr)))) 285