1*4882a593SmuzhiyunFrom 0cafb99b57f43cf6ac2c6208718e49ad2dbe462d Mon Sep 17 00:00:00 2001 2*4882a593SmuzhiyunFrom: Jan Schmidt <thaytan@noraisin.net> 3*4882a593SmuzhiyunDate: Sun, 10 Nov 2013 00:49:52 +1100 4*4882a593SmuzhiyunSubject: [PATCH] Import revision 1206 from upstream to fix PIE build. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunFunctions MC_put_o_16_arm, MC_put_o_8_arm, MC_put_x_16_arm, MC_put_x_8_arm 7*4882a593Smuzhiyunin libmpeg2/motion_comp_arm_s.S have addresses in .text, which is bad 8*4882a593Smuzhiyunfor shared libraries. Some environments demand that .text actually be 9*4882a593Smuzhiyunread-only all the time, yet MC_put_o_16_arm etc require that the addresses 10*4882a593Smuzhiyunbe modified by the dynamic linking mechanism (dlopen, LoadLibrary, etc.) 11*4882a593SmuzhiyunEven in those environments which permit the dynamic linker to modify the 12*4882a593Smuzhiyun.text segment, the runtime cost of doing the relocation can be noticeable. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunThis commit rewrites the linkage, discarding the tables of addresses 15*4882a593Smuzhiyunin favor of tables of offsets. All transfers are local within each individual 16*4882a593Smuzhiyunfunction, so there can be no interference by processing that occurs 17*4882a593Smuzhiyunafter assembly, such as link-time re-ordering (even of individual functions.) 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunPatch by John Reiser <jreiser@bitwagon.com> 20*4882a593SmuzhiyunSigned-off-by: Khem Raj <raj.khem@gmail.com> 21*4882a593SmuzhiyunUpstream-Status: Backport [https://code.videolan.org/videolan/libmpeg2/commit/946bf4b518aacc224f845e73708f99e394744499] 22*4882a593Smuzhiyun--- 23*4882a593Smuzhiyun libmpeg2/motion_comp_arm_s.S | 70 +++++++++++++++++------------------- 24*4882a593Smuzhiyun 1 file changed, 33 insertions(+), 37 deletions(-) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyundiff --git a/libmpeg2/motion_comp_arm_s.S b/libmpeg2/motion_comp_arm_s.S 27*4882a593Smuzhiyunindex c921f7c..82143f8 100644 28*4882a593Smuzhiyun--- a/libmpeg2/motion_comp_arm_s.S 29*4882a593Smuzhiyun+++ b/libmpeg2/motion_comp_arm_s.S 30*4882a593Smuzhiyun@@ -30,9 +30,13 @@ MC_put_o_16_arm: 31*4882a593Smuzhiyun pld [r1] 32*4882a593Smuzhiyun stmfd sp!, {r4-r11, lr} @ R14 is also called LR 33*4882a593Smuzhiyun and r4, r1, #3 34*4882a593Smuzhiyun- adr r5, MC_put_o_16_arm_align_jt 35*4882a593Smuzhiyun- add r5, r5, r4, lsl #2 36*4882a593Smuzhiyun- ldr pc, [r5] 37*4882a593Smuzhiyun+ ldrb r4, [pc, r4] 38*4882a593Smuzhiyun+ add pc, pc, r4, lsl #2 39*4882a593Smuzhiyun+ .byte (MC_put_o_16_arm_align0 - 0f)>>2 40*4882a593Smuzhiyun+ .byte (MC_put_o_16_arm_align1 - 0f)>>2 41*4882a593Smuzhiyun+ .byte (MC_put_o_16_arm_align2 - 0f)>>2 42*4882a593Smuzhiyun+ .byte (MC_put_o_16_arm_align3 - 0f)>>2 43*4882a593Smuzhiyun+0: 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun MC_put_o_16_arm_align0: 46*4882a593Smuzhiyun ldmia r1, {r4-r7} 47*4882a593Smuzhiyun@@ -76,11 +80,6 @@ MC_put_o_16_arm_align3: 48*4882a593Smuzhiyun 1: PROC(24) 49*4882a593Smuzhiyun bne 1b 50*4882a593Smuzhiyun ldmfd sp!, {r4-r11, pc} @@ update PC with LR content. 51*4882a593Smuzhiyun-MC_put_o_16_arm_align_jt: 52*4882a593Smuzhiyun- .word MC_put_o_16_arm_align0 53*4882a593Smuzhiyun- .word MC_put_o_16_arm_align1 54*4882a593Smuzhiyun- .word MC_put_o_16_arm_align2 55*4882a593Smuzhiyun- .word MC_put_o_16_arm_align3 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun @ ---------------------------------------------------------------- 58*4882a593Smuzhiyun .align 59*4882a593Smuzhiyun@@ -91,9 +90,14 @@ MC_put_o_8_arm: 60*4882a593Smuzhiyun pld [r1] 61*4882a593Smuzhiyun stmfd sp!, {r4-r10, lr} @ R14 is also called LR 62*4882a593Smuzhiyun and r4, r1, #3 63*4882a593Smuzhiyun- adr r5, MC_put_o_8_arm_align_jt 64*4882a593Smuzhiyun- add r5, r5, r4, lsl #2 65*4882a593Smuzhiyun- ldr pc, [r5] 66*4882a593Smuzhiyun+ ldrb r4, [pc, r4] 67*4882a593Smuzhiyun+ add pc, pc, r4, lsl #2 68*4882a593Smuzhiyun+ .byte (MC_put_o_8_arm_align0 - 0f)>>2 69*4882a593Smuzhiyun+ .byte (MC_put_o_8_arm_align1 - 0f)>>2 70*4882a593Smuzhiyun+ .byte (MC_put_o_8_arm_align2 - 0f)>>2 71*4882a593Smuzhiyun+ .byte (MC_put_o_8_arm_align3 - 0f)>>2 72*4882a593Smuzhiyun+0: 73*4882a593Smuzhiyun+ 74*4882a593Smuzhiyun MC_put_o_8_arm_align0: 75*4882a593Smuzhiyun ldmia r1, {r4-r5} 76*4882a593Smuzhiyun add r1, r1, r2 77*4882a593Smuzhiyun@@ -135,12 +139,6 @@ MC_put_o_8_arm_align3: 78*4882a593Smuzhiyun bne 1b 79*4882a593Smuzhiyun ldmfd sp!, {r4-r10, pc} @@ update PC with LR content. 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun-MC_put_o_8_arm_align_jt: 82*4882a593Smuzhiyun- .word MC_put_o_8_arm_align0 83*4882a593Smuzhiyun- .word MC_put_o_8_arm_align1 84*4882a593Smuzhiyun- .word MC_put_o_8_arm_align2 85*4882a593Smuzhiyun- .word MC_put_o_8_arm_align3 86*4882a593Smuzhiyun- 87*4882a593Smuzhiyun @ ---------------------------------------------------------------- 88*4882a593Smuzhiyun .macro AVG_PW rW1, rW2 89*4882a593Smuzhiyun mov \rW2, \rW2, lsl #24 90*4882a593Smuzhiyun@@ -160,12 +158,17 @@ MC_put_x_16_arm: 91*4882a593Smuzhiyun @@ void func(uint8_t * dest, const uint8_t * ref, int stride, int height) 92*4882a593Smuzhiyun pld [r1] 93*4882a593Smuzhiyun stmfd sp!, {r4-r11,lr} @ R14 is also called LR 94*4882a593Smuzhiyun+ ldr r11, 0f 95*4882a593Smuzhiyun and r4, r1, #3 96*4882a593Smuzhiyun- adr r5, MC_put_x_16_arm_align_jt 97*4882a593Smuzhiyun- ldr r11, [r5] 98*4882a593Smuzhiyun mvn r12, r11 99*4882a593Smuzhiyun- add r5, r5, r4, lsl #2 100*4882a593Smuzhiyun- ldr pc, [r5, #4] 101*4882a593Smuzhiyun+ ldrb r4, [pc, r4] 102*4882a593Smuzhiyun+ add pc, pc, r4, lsl #2 103*4882a593Smuzhiyun+ .byte (MC_put_x_16_arm_align0 - 0f)>>2 104*4882a593Smuzhiyun+ .byte (MC_put_x_16_arm_align1 - 0f)>>2 105*4882a593Smuzhiyun+ .byte (MC_put_x_16_arm_align2 - 0f)>>2 106*4882a593Smuzhiyun+ .byte (MC_put_x_16_arm_align3 - 0f)>>2 107*4882a593Smuzhiyun+0: 108*4882a593Smuzhiyun+ .word 0x01010101 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun .macro ADJ_ALIGN_QW shift, R0, R1, R2, R3, R4 111*4882a593Smuzhiyun mov \R0, \R0, lsr #(\shift) 112*4882a593Smuzhiyun@@ -238,12 +241,6 @@ MC_put_x_16_arm_align3: 113*4882a593Smuzhiyun add r0, r0, r2 114*4882a593Smuzhiyun bne 1b 115*4882a593Smuzhiyun ldmfd sp!, {r4-r11,pc} @@ update PC with LR content. 116*4882a593Smuzhiyun-MC_put_x_16_arm_align_jt: 117*4882a593Smuzhiyun- .word 0x01010101 118*4882a593Smuzhiyun- .word MC_put_x_16_arm_align0 119*4882a593Smuzhiyun- .word MC_put_x_16_arm_align1 120*4882a593Smuzhiyun- .word MC_put_x_16_arm_align2 121*4882a593Smuzhiyun- .word MC_put_x_16_arm_align3 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun @ ---------------------------------------------------------------- 124*4882a593Smuzhiyun .align 125*4882a593Smuzhiyun@@ -253,12 +250,17 @@ MC_put_x_8_arm: 126*4882a593Smuzhiyun @@ void func(uint8_t * dest, const uint8_t * ref, int stride, int height) 127*4882a593Smuzhiyun pld [r1] 128*4882a593Smuzhiyun stmfd sp!, {r4-r11,lr} @ R14 is also called LR 129*4882a593Smuzhiyun+ ldr r11, 0f 130*4882a593Smuzhiyun and r4, r1, #3 131*4882a593Smuzhiyun- adr r5, MC_put_x_8_arm_align_jt 132*4882a593Smuzhiyun- ldr r11, [r5] 133*4882a593Smuzhiyun mvn r12, r11 134*4882a593Smuzhiyun- add r5, r5, r4, lsl #2 135*4882a593Smuzhiyun- ldr pc, [r5, #4] 136*4882a593Smuzhiyun+ ldrb r4, [pc, r4] 137*4882a593Smuzhiyun+ add pc, pc, r4, lsl #2 138*4882a593Smuzhiyun+ .byte (MC_put_x_8_arm_align0 - 0f)>>2 139*4882a593Smuzhiyun+ .byte (MC_put_x_8_arm_align1 - 0f)>>2 140*4882a593Smuzhiyun+ .byte (MC_put_x_8_arm_align2 - 0f)>>2 141*4882a593Smuzhiyun+ .byte (MC_put_x_8_arm_align3 - 0f)>>2 142*4882a593Smuzhiyun+0: 143*4882a593Smuzhiyun+ .word 0x01010101 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun .macro ADJ_ALIGN_DW shift, R0, R1, R2 146*4882a593Smuzhiyun mov \R0, \R0, lsr #(\shift) 147*4882a593Smuzhiyun@@ -319,9 +321,3 @@ MC_put_x_8_arm_align3: 148*4882a593Smuzhiyun add r0, r0, r2 149*4882a593Smuzhiyun bne 1b 150*4882a593Smuzhiyun ldmfd sp!, {r4-r11,pc} @@ update PC with LR content. 151*4882a593Smuzhiyun-MC_put_x_8_arm_align_jt: 152*4882a593Smuzhiyun- .word 0x01010101 153*4882a593Smuzhiyun- .word MC_put_x_8_arm_align0 154*4882a593Smuzhiyun- .word MC_put_x_8_arm_align1 155*4882a593Smuzhiyun- .word MC_put_x_8_arm_align2 156*4882a593Smuzhiyun- .word MC_put_x_8_arm_align3 157