1*4882a593Smuzhiyun 2*4882a593Smuzhiyun# Right now this is focused on arm-specific tune features. 3*4882a593Smuzhiyun# We get away with this for now as one can only use x86-64 as the build host 4*4882a593Smuzhiyun# (not arm). 5*4882a593Smuzhiyun# Note that TUNE_FEATURES is _always_ refering to the target, so we really 6*4882a593Smuzhiyun# don't want to use this for the host/build. 7*4882a593Smuzhiyundef llvm_features_from_tune(d): 8*4882a593Smuzhiyun f = [] 9*4882a593Smuzhiyun feat = d.getVar('TUNE_FEATURES') 10*4882a593Smuzhiyun if not feat: 11*4882a593Smuzhiyun return [] 12*4882a593Smuzhiyun feat = frozenset(feat.split()) 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun mach_overrides = d.getVar('MACHINEOVERRIDES') 15*4882a593Smuzhiyun mach_overrides = frozenset(mach_overrides.split(':')) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun if 'vfpv4' in feat: 18*4882a593Smuzhiyun f.append("+vfp4") 19*4882a593Smuzhiyun if 'vfpv3' in feat: 20*4882a593Smuzhiyun f.append("+vfp3") 21*4882a593Smuzhiyun if 'vfpv3d16' in feat: 22*4882a593Smuzhiyun f.append("+d16") 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun if 'vfpv2' in feat or 'vfp' in feat: 25*4882a593Smuzhiyun f.append("+vfp2") 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun if 'neon' in feat: 28*4882a593Smuzhiyun f.append("+neon") 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun if 'mips32' in feat: 31*4882a593Smuzhiyun f.append("+mips32") 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun if 'mips32r2' in feat: 34*4882a593Smuzhiyun f.append("+mips32r2") 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun if target_is_armv7(d): 37*4882a593Smuzhiyun f.append('+v7') 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun if ('armv6' in mach_overrides) or ('armv6' in feat): 40*4882a593Smuzhiyun f.append("+v6") 41*4882a593Smuzhiyun if 'armv5te' in feat: 42*4882a593Smuzhiyun f.append("+strict-align") 43*4882a593Smuzhiyun f.append("+v5te") 44*4882a593Smuzhiyun elif 'armv5' in feat: 45*4882a593Smuzhiyun f.append("+strict-align") 46*4882a593Smuzhiyun f.append("+v5") 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun if ('armv4' in mach_overrides) or ('armv4' in feat): 49*4882a593Smuzhiyun f.append("+strict-align") 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun if 'dsp' in feat: 52*4882a593Smuzhiyun f.append("+dsp") 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun if 'thumb' in feat: 55*4882a593Smuzhiyun if d.getVar('ARM_THUMB_OPT') == "thumb": 56*4882a593Smuzhiyun if target_is_armv7(d): 57*4882a593Smuzhiyun f.append('+thumb2') 58*4882a593Smuzhiyun f.append("+thumb-mode") 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun if 'cortexa5' in feat: 61*4882a593Smuzhiyun f.append("+a5") 62*4882a593Smuzhiyun if 'cortexa7' in feat: 63*4882a593Smuzhiyun f.append("+a7") 64*4882a593Smuzhiyun if 'cortexa9' in feat: 65*4882a593Smuzhiyun f.append("+a9") 66*4882a593Smuzhiyun if 'cortexa15' in feat: 67*4882a593Smuzhiyun f.append("+a15") 68*4882a593Smuzhiyun if 'cortexa17' in feat: 69*4882a593Smuzhiyun f.append("+a17") 70*4882a593Smuzhiyun if ('riscv64' in feat) or ('riscv32' in feat): 71*4882a593Smuzhiyun f.append("+a,+c,+d,+f,+m") 72*4882a593Smuzhiyun return f 73*4882a593Smuzhiyunllvm_features_from_tune[vardepvalue] = "${@llvm_features_from_tune(d)}" 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun# TARGET_CC_ARCH changes from build/cross/target so it'll do the right thing 76*4882a593Smuzhiyun# this should go away when https://github.com/rust-lang/rust/pull/31709 is 77*4882a593Smuzhiyun# stable (1.9.0?) 78*4882a593Smuzhiyundef llvm_features_from_cc_arch(d): 79*4882a593Smuzhiyun f = [] 80*4882a593Smuzhiyun feat = d.getVar('TARGET_CC_ARCH') 81*4882a593Smuzhiyun if not feat: 82*4882a593Smuzhiyun return [] 83*4882a593Smuzhiyun feat = frozenset(feat.split()) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun if '-mmmx' in feat: 86*4882a593Smuzhiyun f.append("+mmx") 87*4882a593Smuzhiyun if '-msse' in feat: 88*4882a593Smuzhiyun f.append("+sse") 89*4882a593Smuzhiyun if '-msse2' in feat: 90*4882a593Smuzhiyun f.append("+sse2") 91*4882a593Smuzhiyun if '-msse3' in feat: 92*4882a593Smuzhiyun f.append("+sse3") 93*4882a593Smuzhiyun if '-mssse3' in feat: 94*4882a593Smuzhiyun f.append("+ssse3") 95*4882a593Smuzhiyun if '-msse4.1' in feat: 96*4882a593Smuzhiyun f.append("+sse4.1") 97*4882a593Smuzhiyun if '-msse4.2' in feat: 98*4882a593Smuzhiyun f.append("+sse4.2") 99*4882a593Smuzhiyun if '-msse4a' in feat: 100*4882a593Smuzhiyun f.append("+sse4a") 101*4882a593Smuzhiyun if '-mavx' in feat: 102*4882a593Smuzhiyun f.append("+avx") 103*4882a593Smuzhiyun if '-mavx2' in feat: 104*4882a593Smuzhiyun f.append("+avx2") 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun return f 107*4882a593Smuzhiyun 108*4882a593Smuzhiyundef llvm_features_from_target_fpu(d): 109*4882a593Smuzhiyun # TARGET_FPU can be hard or soft. +soft-float tell llvm to use soft float 110*4882a593Smuzhiyun # ABI. There is no option for hard. 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun fpu = d.getVar('TARGET_FPU') 113*4882a593Smuzhiyun return ["+soft-float"] if fpu == "soft" else [] 114*4882a593Smuzhiyun 115*4882a593Smuzhiyundef llvm_features(d): 116*4882a593Smuzhiyun return ','.join(llvm_features_from_tune(d) + 117*4882a593Smuzhiyun llvm_features_from_cc_arch(d) + 118*4882a593Smuzhiyun llvm_features_from_target_fpu(d)) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun## arm-unknown-linux-gnueabihf 122*4882a593SmuzhiyunDATA_LAYOUT[arm] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 123*4882a593SmuzhiyunTARGET_ENDIAN[arm] = "little" 124*4882a593SmuzhiyunTARGET_POINTER_WIDTH[arm] = "32" 125*4882a593SmuzhiyunTARGET_C_INT_WIDTH[arm] = "32" 126*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[arm] = "64" 127*4882a593SmuzhiyunFEATURES[arm] = "+v6,+vfp2" 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun## armv7-unknown-linux-gnueabihf 130*4882a593SmuzhiyunDATA_LAYOUT[armv7-eabi] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 131*4882a593SmuzhiyunTARGET_ENDIAN[armv7-eabi] = "little" 132*4882a593SmuzhiyunTARGET_POINTER_WIDTH[armv7-eabi] = "32" 133*4882a593SmuzhiyunTARGET_C_INT_WIDTH[armv7-eabi] = "32" 134*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[armv7-eabi] = "64" 135*4882a593SmuzhiyunFEATURES[armv7-eabi] = "+v7,+vfp2,+thumb2" 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun## aarch64-unknown-linux-{gnu, musl} 138*4882a593SmuzhiyunDATA_LAYOUT[aarch64] = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 139*4882a593SmuzhiyunTARGET_ENDIAN[aarch64] = "little" 140*4882a593SmuzhiyunTARGET_POINTER_WIDTH[aarch64] = "64" 141*4882a593SmuzhiyunTARGET_C_INT_WIDTH[aarch64] = "32" 142*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[aarch64] = "128" 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun## x86_64-unknown-linux-{gnu, musl} 145*4882a593SmuzhiyunDATA_LAYOUT[x86_64] = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 146*4882a593SmuzhiyunTARGET_ENDIAN[x86_64] = "little" 147*4882a593SmuzhiyunTARGET_POINTER_WIDTH[x86_64] = "64" 148*4882a593SmuzhiyunTARGET_C_INT_WIDTH[x86_64] = "32" 149*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[x86_64] = "64" 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun## x86_64-unknown-linux-gnux32 152*4882a593SmuzhiyunDATA_LAYOUT[x86_64-x32] = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 153*4882a593SmuzhiyunTARGET_ENDIAN[x86_64-x32] = "little" 154*4882a593SmuzhiyunTARGET_POINTER_WIDTH[x86_64-x32] = "32" 155*4882a593SmuzhiyunTARGET_C_INT_WIDTH[x86_64-x32] = "32" 156*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[x86_64-x32] = "64" 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun## i686-unknown-linux-{gnu, musl} 159*4882a593SmuzhiyunDATA_LAYOUT[i686] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128" 160*4882a593SmuzhiyunTARGET_ENDIAN[i686] = "little" 161*4882a593SmuzhiyunTARGET_POINTER_WIDTH[i686] = "32" 162*4882a593SmuzhiyunTARGET_C_INT_WIDTH[i686] = "32" 163*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[i686] = "64" 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun## XXX: a bit of a hack so qemux86 builds, clone of i686-unknown-linux-{gnu, musl} above 166*4882a593SmuzhiyunDATA_LAYOUT[i586] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128" 167*4882a593SmuzhiyunTARGET_ENDIAN[i586] = "little" 168*4882a593SmuzhiyunTARGET_POINTER_WIDTH[i586] = "32" 169*4882a593SmuzhiyunTARGET_C_INT_WIDTH[i586] = "32" 170*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[i586] = "64" 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun## mips-unknown-linux-{gnu, musl} 173*4882a593SmuzhiyunDATA_LAYOUT[mips] = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64" 174*4882a593SmuzhiyunTARGET_ENDIAN[mips] = "big" 175*4882a593SmuzhiyunTARGET_POINTER_WIDTH[mips] = "32" 176*4882a593SmuzhiyunTARGET_C_INT_WIDTH[mips] = "32" 177*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[mips] = "32" 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun## mipsel-unknown-linux-{gnu, musl} 180*4882a593SmuzhiyunDATA_LAYOUT[mipsel] = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64" 181*4882a593SmuzhiyunTARGET_ENDIAN[mipsel] = "little" 182*4882a593SmuzhiyunTARGET_POINTER_WIDTH[mipsel] = "32" 183*4882a593SmuzhiyunTARGET_C_INT_WIDTH[mipsel] = "32" 184*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[mipsel] = "32" 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun## mips64-unknown-linux-{gnu, musl} 187*4882a593SmuzhiyunDATA_LAYOUT[mips64] = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128" 188*4882a593SmuzhiyunTARGET_ENDIAN[mips64] = "big" 189*4882a593SmuzhiyunTARGET_POINTER_WIDTH[mips64] = "64" 190*4882a593SmuzhiyunTARGET_C_INT_WIDTH[mips64] = "64" 191*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[mips64] = "64" 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun## mips64el-unknown-linux-{gnu, musl} 194*4882a593SmuzhiyunDATA_LAYOUT[mips64el] = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128" 195*4882a593SmuzhiyunTARGET_ENDIAN[mips64el] = "little" 196*4882a593SmuzhiyunTARGET_POINTER_WIDTH[mips64el] = "64" 197*4882a593SmuzhiyunTARGET_C_INT_WIDTH[mips64el] = "64" 198*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[mips64el] = "64" 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun## powerpc-unknown-linux-{gnu, musl} 201*4882a593SmuzhiyunDATA_LAYOUT[powerpc] = "E-m:e-p:32:32-i64:64-n32" 202*4882a593SmuzhiyunTARGET_ENDIAN[powerpc] = "big" 203*4882a593SmuzhiyunTARGET_POINTER_WIDTH[powerpc] = "32" 204*4882a593SmuzhiyunTARGET_C_INT_WIDTH[powerpc] = "32" 205*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[powerpc] = "32" 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun## powerpc64-unknown-linux-{gnu, musl} 208*4882a593SmuzhiyunDATA_LAYOUT[powerpc64] = "E-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512" 209*4882a593SmuzhiyunTARGET_ENDIAN[powerpc64] = "big" 210*4882a593SmuzhiyunTARGET_POINTER_WIDTH[powerpc64] = "64" 211*4882a593SmuzhiyunTARGET_C_INT_WIDTH[powerpc64] = "64" 212*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[powerpc64] = "64" 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun## powerpc64le-unknown-linux-{gnu, musl} 215*4882a593SmuzhiyunDATA_LAYOUT[powerpc64le] = "e-m:e-i64:64-n32:64-v256:256:256-v512:512:512" 216*4882a593SmuzhiyunTARGET_ENDIAN[powerpc64le] = "little" 217*4882a593SmuzhiyunTARGET_POINTER_WIDTH[powerpc64le] = "64" 218*4882a593SmuzhiyunTARGET_C_INT_WIDTH[powerpc64le] = "64" 219*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[powerpc64le] = "64" 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun## riscv32-unknown-linux-{gnu, musl} 222*4882a593SmuzhiyunDATA_LAYOUT[riscv32] = "e-m:e-p:32:32-i64:64-n32-S128" 223*4882a593SmuzhiyunTARGET_ENDIAN[riscv32] = "little" 224*4882a593SmuzhiyunTARGET_POINTER_WIDTH[riscv32] = "32" 225*4882a593SmuzhiyunTARGET_C_INT_WIDTH[riscv32] = "32" 226*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[riscv32] = "32" 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun## riscv64-unknown-linux-{gnu, musl} 229*4882a593SmuzhiyunDATA_LAYOUT[riscv64] = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" 230*4882a593SmuzhiyunTARGET_ENDIAN[riscv64] = "little" 231*4882a593SmuzhiyunTARGET_POINTER_WIDTH[riscv64] = "64" 232*4882a593SmuzhiyunTARGET_C_INT_WIDTH[riscv64] = "64" 233*4882a593SmuzhiyunMAX_ATOMIC_WIDTH[riscv64] = "64" 234*4882a593Smuzhiyun 235*4882a593Smuzhiyundef sys_for(d, thing): 236*4882a593Smuzhiyun return d.getVar('{}_SYS'.format(thing)) 237*4882a593Smuzhiyun 238*4882a593Smuzhiyundef prefix_for(d, thing): 239*4882a593Smuzhiyun return d.getVar('{}_PREFIX'.format(thing)) 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun# Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something 242*4882a593Smuzhiyun# rust's internals won't choke on. 243*4882a593Smuzhiyundef arch_to_rust_target_arch(arch): 244*4882a593Smuzhiyun if arch == "i586" or arch == "i686": 245*4882a593Smuzhiyun return "x86" 246*4882a593Smuzhiyun elif arch == "mipsel": 247*4882a593Smuzhiyun return "mips" 248*4882a593Smuzhiyun elif arch == "mip64sel": 249*4882a593Smuzhiyun return "mips64" 250*4882a593Smuzhiyun elif arch == "armv7": 251*4882a593Smuzhiyun return "arm" 252*4882a593Smuzhiyun elif arch == "powerpc64le": 253*4882a593Smuzhiyun return "powerpc64" 254*4882a593Smuzhiyun else: 255*4882a593Smuzhiyun return arch 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun# generates our target CPU value 258*4882a593Smuzhiyundef llvm_cpu(d): 259*4882a593Smuzhiyun cpu = d.getVar('PACKAGE_ARCH') 260*4882a593Smuzhiyun target = d.getVar('TRANSLATED_TARGET_ARCH') 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun trans = {} 263*4882a593Smuzhiyun trans['corei7-64'] = "corei7" 264*4882a593Smuzhiyun trans['core2-32'] = "core2" 265*4882a593Smuzhiyun trans['x86-64'] = "x86-64" 266*4882a593Smuzhiyun trans['i686'] = "i686" 267*4882a593Smuzhiyun trans['i586'] = "i586" 268*4882a593Smuzhiyun trans['powerpc'] = "powerpc" 269*4882a593Smuzhiyun trans['mips64'] = "mips64" 270*4882a593Smuzhiyun trans['mips64el'] = "mips64" 271*4882a593Smuzhiyun trans['riscv64'] = "generic-rv64" 272*4882a593Smuzhiyun trans['riscv32'] = "generic-rv32" 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun if target in ["mips", "mipsel"]: 275*4882a593Smuzhiyun feat = frozenset(d.getVar('TUNE_FEATURES').split()) 276*4882a593Smuzhiyun if "mips32r2" in feat: 277*4882a593Smuzhiyun trans['mipsel'] = "mips32r2" 278*4882a593Smuzhiyun trans['mips'] = "mips32r2" 279*4882a593Smuzhiyun elif "mips32" in feat: 280*4882a593Smuzhiyun trans['mipsel'] = "mips32" 281*4882a593Smuzhiyun trans['mips'] = "mips32" 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun try: 284*4882a593Smuzhiyun return trans[cpu] 285*4882a593Smuzhiyun except: 286*4882a593Smuzhiyun return trans.get(target, "generic") 287*4882a593Smuzhiyun 288*4882a593SmuzhiyunTARGET_LLVM_CPU="${@llvm_cpu(d)}" 289*4882a593SmuzhiyunTARGET_LLVM_FEATURES = "${@llvm_features(d)}" 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun# class-native implies TARGET=HOST, and TUNE_FEATURES only describes the real 292*4882a593Smuzhiyun# (original) target. 293*4882a593SmuzhiyunTARGET_LLVM_FEATURES:class-native = "${@','.join(llvm_features_from_cc_arch(d))}" 294*4882a593Smuzhiyun 295*4882a593Smuzhiyundef rust_gen_target(d, thing, wd, features, cpu, arch, abi=""): 296*4882a593Smuzhiyun import json 297*4882a593Smuzhiyun sys = sys_for(d, thing) 298*4882a593Smuzhiyun prefix = prefix_for(d, thing) 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun rust_arch = oe.rust.arch_to_rust_arch(arch) 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun if abi: 303*4882a593Smuzhiyun arch_abi = "{}-{}".format(rust_arch, abi) 304*4882a593Smuzhiyun else: 305*4882a593Smuzhiyun arch_abi = rust_arch 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun features = features or d.getVarFlag('FEATURES', arch_abi) or "" 308*4882a593Smuzhiyun features = features.strip() 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun # build tspec 311*4882a593Smuzhiyun tspec = {} 312*4882a593Smuzhiyun tspec['llvm-target'] = d.getVar('RUST_TARGET_SYS', arch_abi) 313*4882a593Smuzhiyun tspec['data-layout'] = d.getVarFlag('DATA_LAYOUT', arch_abi) 314*4882a593Smuzhiyun tspec['max-atomic-width'] = int(d.getVarFlag('MAX_ATOMIC_WIDTH', arch_abi)) 315*4882a593Smuzhiyun tspec['target-pointer-width'] = d.getVarFlag('TARGET_POINTER_WIDTH', arch_abi) 316*4882a593Smuzhiyun tspec['target-c-int-width'] = d.getVarFlag('TARGET_C_INT_WIDTH', arch_abi) 317*4882a593Smuzhiyun tspec['target-endian'] = d.getVarFlag('TARGET_ENDIAN', arch_abi) 318*4882a593Smuzhiyun tspec['arch'] = arch_to_rust_target_arch(rust_arch) 319*4882a593Smuzhiyun tspec['os'] = "linux" 320*4882a593Smuzhiyun if "musl" in tspec['llvm-target']: 321*4882a593Smuzhiyun tspec['env'] = "musl" 322*4882a593Smuzhiyun else: 323*4882a593Smuzhiyun tspec['env'] = "gnu" 324*4882a593Smuzhiyun if "riscv64" in tspec['llvm-target']: 325*4882a593Smuzhiyun tspec['llvm-abiname'] = "lp64d" 326*4882a593Smuzhiyun if "riscv32" in tspec['llvm-target']: 327*4882a593Smuzhiyun tspec['llvm-abiname'] = "ilp32d" 328*4882a593Smuzhiyun tspec['vendor'] = "unknown" 329*4882a593Smuzhiyun tspec['target-family'] = "unix" 330*4882a593Smuzhiyun tspec['linker'] = "{}{}gcc".format(d.getVar('CCACHE'), prefix) 331*4882a593Smuzhiyun tspec['cpu'] = cpu 332*4882a593Smuzhiyun if features != "": 333*4882a593Smuzhiyun tspec['features'] = features 334*4882a593Smuzhiyun tspec['dynamic-linking'] = True 335*4882a593Smuzhiyun tspec['executables'] = True 336*4882a593Smuzhiyun tspec['linker-is-gnu'] = True 337*4882a593Smuzhiyun tspec['linker-flavor'] = "gcc" 338*4882a593Smuzhiyun tspec['has-rpath'] = True 339*4882a593Smuzhiyun tspec['has-elf-tls'] = True 340*4882a593Smuzhiyun tspec['position-independent-executables'] = True 341*4882a593Smuzhiyun tspec['panic-strategy'] = d.getVar("RUST_PANIC_STRATEGY") 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun # write out the target spec json file 344*4882a593Smuzhiyun with open(wd + sys + '.json', 'w') as f: 345*4882a593Smuzhiyun json.dump(tspec, f, indent=4) 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun# These are accounted for in tmpdir path names so don't need to be in the task sig 348*4882a593Smuzhiyunrust_gen_target[vardepsexclude] += "RUST_HOST_SYS RUST_TARGET_SYS" 349*4882a593Smuzhiyun 350*4882a593Smuzhiyundo_rust_gen_targets[vardeps] += "DATA_LAYOUT TARGET_ENDIAN TARGET_POINTER_WIDTH TARGET_C_INT_WIDTH MAX_ATOMIC_WIDTH FEATURES" 351*4882a593Smuzhiyun 352*4882a593Smuzhiyunpython do_rust_gen_targets () { 353*4882a593Smuzhiyun wd = d.getVar('WORKDIR') + '/targets/' 354*4882a593Smuzhiyun build_arch = d.getVar('BUILD_ARCH') 355*4882a593Smuzhiyun rust_gen_target(d, 'BUILD', wd, "", "generic", build_arch) 356*4882a593Smuzhiyun} 357*4882a593Smuzhiyun 358*4882a593Smuzhiyunaddtask rust_gen_targets after do_patch before do_compile 359*4882a593Smuzhiyundo_rust_gen_targets[dirs] += "${WORKDIR}/targets" 360*4882a593Smuzhiyun 361