1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * The following Boot Header format/structures and values are defined in the
7*4882a593Smuzhiyun * following documents:
8*4882a593Smuzhiyun * * Xilinx Zynq-7000 Technical Reference Manual (Section 6.3)
9*4882a593Smuzhiyun * * Xilinx Zynq-7000 Software Developers Guide (Appendix A.7 and A.8)
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Expected Header Size = 0x8C0
12*4882a593Smuzhiyun * Forced as 'little' endian, 32-bit words
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * 0x 0 - Interrupt Table (8 words)
15*4882a593Smuzhiyun * ... (Default value = 0xeafffffe)
16*4882a593Smuzhiyun * 0x 1f
17*4882a593Smuzhiyun * 0x 20 - Width Detection
18*4882a593Smuzhiyun * * DEFAULT_WIDTHDETECTION 0xaa995566
19*4882a593Smuzhiyun * 0x 24 - Image Identifier
20*4882a593Smuzhiyun * * DEFAULT_IMAGEIDENTIFIER 0x584c4e58
21*4882a593Smuzhiyun * 0x 28 - Encryption
22*4882a593Smuzhiyun * * 0x00000000 - None
23*4882a593Smuzhiyun * * 0xa5c3c5a3 - eFuse
24*4882a593Smuzhiyun * * 0x3a5c3c5a - bbRam
25*4882a593Smuzhiyun * 0x 2C - User Field
26*4882a593Smuzhiyun * 0x 30 - Image Offset
27*4882a593Smuzhiyun * 0x 34 - Image Size
28*4882a593Smuzhiyun * 0x 38 - Reserved (0x00000000) (according to spec)
29*4882a593Smuzhiyun * * FSBL defines this field for Image Destination Address.
30*4882a593Smuzhiyun * 0x 3C - Image Load
31*4882a593Smuzhiyun * 0x 40 - Image Stored Size
32*4882a593Smuzhiyun * 0x 44 - Reserved (0x00000000) (according to spec)
33*4882a593Smuzhiyun * * FSBL defines this field for QSPI configuration Data.
34*4882a593Smuzhiyun * 0x 48 - Checksum
35*4882a593Smuzhiyun * 0x 4c - Unused (21 words)
36*4882a593Smuzhiyun * ...
37*4882a593Smuzhiyun * 0x 9c
38*4882a593Smuzhiyun * 0x a0 - Register Initialization, 256 Address and Data word pairs
39*4882a593Smuzhiyun * * List is terminated with an address of 0xffffffff or
40*4882a593Smuzhiyun * ... * at the max number of entries
41*4882a593Smuzhiyun * 0x89c
42*4882a593Smuzhiyun * 0x8a0 - Unused (8 words)
43*4882a593Smuzhiyun * ...
44*4882a593Smuzhiyun * 0x8bf
45*4882a593Smuzhiyun * 0x8c0 - Data/Image starts here or above
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #include "imagetool.h"
49*4882a593Smuzhiyun #include "mkimage.h"
50*4882a593Smuzhiyun #include <image.h>
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
53*4882a593Smuzhiyun #define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
54*4882a593Smuzhiyun #define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
55*4882a593Smuzhiyun #define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun enum {
58*4882a593Smuzhiyun ENCRYPTION_EFUSE = 0xa5c3c5a3,
59*4882a593Smuzhiyun ENCRYPTION_BBRAM = 0x3a5c3c5a,
60*4882a593Smuzhiyun ENCRYPTION_NONE = 0x0,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun struct zynq_reginit {
64*4882a593Smuzhiyun uint32_t address;
65*4882a593Smuzhiyun uint32_t data;
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define HEADER_INTERRUPT_VECTORS 8
69*4882a593Smuzhiyun #define HEADER_REGINITS 256
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun struct zynq_header {
72*4882a593Smuzhiyun uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
73*4882a593Smuzhiyun uint32_t width_detection; /* 0x20 */
74*4882a593Smuzhiyun uint32_t image_identifier; /* 0x24 */
75*4882a593Smuzhiyun uint32_t encryption; /* 0x28 */
76*4882a593Smuzhiyun uint32_t user_field; /* 0x2c */
77*4882a593Smuzhiyun uint32_t image_offset; /* 0x30 */
78*4882a593Smuzhiyun uint32_t image_size; /* 0x34 */
79*4882a593Smuzhiyun uint32_t __reserved1; /* 0x38 */
80*4882a593Smuzhiyun uint32_t image_load; /* 0x3c */
81*4882a593Smuzhiyun uint32_t image_stored_size; /* 0x40 */
82*4882a593Smuzhiyun uint32_t __reserved2; /* 0x44 */
83*4882a593Smuzhiyun uint32_t checksum; /* 0x48 */
84*4882a593Smuzhiyun uint32_t __reserved3[21]; /* 0x4c */
85*4882a593Smuzhiyun struct zynq_reginit register_init[HEADER_REGINITS]; /* 0xa0 */
86*4882a593Smuzhiyun uint32_t __reserved4[8]; /* 0x8a0 */
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static struct zynq_header zynqimage_header;
90*4882a593Smuzhiyun
zynqimage_checksum(struct zynq_header * ptr)91*4882a593Smuzhiyun static uint32_t zynqimage_checksum(struct zynq_header *ptr)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun uint32_t checksum = 0;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (ptr == NULL)
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->width_detection);
99*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->image_identifier);
100*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->encryption);
101*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->user_field);
102*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->image_offset);
103*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->image_size);
104*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->__reserved1);
105*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->image_load);
106*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->image_stored_size);
107*4882a593Smuzhiyun checksum += le32_to_cpu(ptr->__reserved2);
108*4882a593Smuzhiyun checksum = ~checksum;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return cpu_to_le32(checksum);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
zynqimage_default_header(struct zynq_header * ptr)113*4882a593Smuzhiyun static void zynqimage_default_header(struct zynq_header *ptr)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun int i;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (ptr == NULL)
118*4882a593Smuzhiyun return;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun ptr->width_detection = HEADER_WIDTHDETECTION;
121*4882a593Smuzhiyun ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
122*4882a593Smuzhiyun ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Setup not-supported/constant/reserved fields */
125*4882a593Smuzhiyun for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++)
126*4882a593Smuzhiyun ptr->interrupt_vectors[i] = HEADER_INTERRUPT_DEFAULT;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun for (i = 0; i < HEADER_REGINITS; i++) {
129*4882a593Smuzhiyun ptr->register_init[i].address = HEADER_REGINIT_NULL;
130*4882a593Smuzhiyun ptr->register_init[i].data = HEADER_REGINIT_NULL;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /*
134*4882a593Smuzhiyun * Certain reserved fields are required to be set to 0, ensure they are
135*4882a593Smuzhiyun * set as such.
136*4882a593Smuzhiyun */
137*4882a593Smuzhiyun ptr->__reserved1 = 0x0;
138*4882a593Smuzhiyun ptr->__reserved2 = 0x0;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /* mkimage glue functions */
zynqimage_verify_header(unsigned char * ptr,int image_size,struct image_tool_params * params)142*4882a593Smuzhiyun static int zynqimage_verify_header(unsigned char *ptr, int image_size,
143*4882a593Smuzhiyun struct image_tool_params *params)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (image_size < sizeof(struct zynq_header))
148*4882a593Smuzhiyun return -1;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun if (zynqhdr->width_detection != HEADER_WIDTHDETECTION)
151*4882a593Smuzhiyun return -1;
152*4882a593Smuzhiyun if (zynqhdr->image_identifier != HEADER_IMAGEIDENTIFIER)
153*4882a593Smuzhiyun return -1;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (zynqimage_checksum(zynqhdr) != zynqhdr->checksum)
156*4882a593Smuzhiyun return -1;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
zynqimage_print_header(const void * ptr)161*4882a593Smuzhiyun static void zynqimage_print_header(const void *ptr)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
164*4882a593Smuzhiyun int i;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun printf("Image Type : Xilinx Zynq Boot Image support\n");
167*4882a593Smuzhiyun printf("Image Offset : 0x%08x\n", le32_to_cpu(zynqhdr->image_offset));
168*4882a593Smuzhiyun printf("Image Size : %lu bytes (%lu bytes packed)\n",
169*4882a593Smuzhiyun (unsigned long)le32_to_cpu(zynqhdr->image_size),
170*4882a593Smuzhiyun (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
171*4882a593Smuzhiyun printf("Image Load : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
172*4882a593Smuzhiyun printf("User Field : 0x%08x\n", le32_to_cpu(zynqhdr->user_field));
173*4882a593Smuzhiyun printf("Checksum : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++) {
176*4882a593Smuzhiyun if (zynqhdr->interrupt_vectors[i] == HEADER_INTERRUPT_DEFAULT)
177*4882a593Smuzhiyun continue;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun printf("Modified Interrupt Vector Address [%d]: 0x%08x\n", i,
180*4882a593Smuzhiyun le32_to_cpu(zynqhdr->interrupt_vectors[i]));
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun for (i = 0; i < HEADER_REGINITS; i++) {
184*4882a593Smuzhiyun if (zynqhdr->register_init[i].address == HEADER_REGINIT_NULL)
185*4882a593Smuzhiyun break;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun if (i == 0)
188*4882a593Smuzhiyun printf("Custom Register Initialization:\n");
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun printf(" @ 0x%08x -> 0x%08x\n",
191*4882a593Smuzhiyun le32_to_cpu(zynqhdr->register_init[i].address),
192*4882a593Smuzhiyun le32_to_cpu(zynqhdr->register_init[i].data));
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
zynqimage_check_params(struct image_tool_params * params)196*4882a593Smuzhiyun static int zynqimage_check_params(struct image_tool_params *params)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun if (!params)
199*4882a593Smuzhiyun return 0;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (params->addr != 0x0) {
202*4882a593Smuzhiyun fprintf(stderr, "Error: Load Address cannot be specified.\n");
203*4882a593Smuzhiyun return -1;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /*
207*4882a593Smuzhiyun * If the entry point is specified ensure it is 64 byte aligned.
208*4882a593Smuzhiyun */
209*4882a593Smuzhiyun if (params->eflag && (params->ep % 64 != 0)) {
210*4882a593Smuzhiyun fprintf(stderr,
211*4882a593Smuzhiyun "Error: Entry Point must be aligned to a 64-byte boundary.\n");
212*4882a593Smuzhiyun return -1;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun return !(params->lflag || params->dflag);
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
zynqimage_check_image_types(uint8_t type)218*4882a593Smuzhiyun static int zynqimage_check_image_types(uint8_t type)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun if (type == IH_TYPE_ZYNQIMAGE)
221*4882a593Smuzhiyun return EXIT_SUCCESS;
222*4882a593Smuzhiyun return EXIT_FAILURE;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
zynqimage_parse_initparams(struct zynq_header * zynqhdr,const char * filename)225*4882a593Smuzhiyun static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
226*4882a593Smuzhiyun const char *filename)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun FILE *fp;
229*4882a593Smuzhiyun struct zynq_reginit reginit;
230*4882a593Smuzhiyun unsigned int reg_count = 0;
231*4882a593Smuzhiyun int r, err;
232*4882a593Smuzhiyun struct stat path_stat;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
235*4882a593Smuzhiyun fp = fopen(filename, "r");
236*4882a593Smuzhiyun if (!fp) {
237*4882a593Smuzhiyun fprintf(stderr, "Cannot open initparams file: %s\n", filename);
238*4882a593Smuzhiyun exit(1);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun err = fstat(fileno(fp), &path_stat);
242*4882a593Smuzhiyun if (err) {
243*4882a593Smuzhiyun fclose(fp);
244*4882a593Smuzhiyun return;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun if (!S_ISREG(path_stat.st_mode)) {
248*4882a593Smuzhiyun fclose(fp);
249*4882a593Smuzhiyun return;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun do {
253*4882a593Smuzhiyun r = fscanf(fp, "%x %x", ®init.address, ®init.data);
254*4882a593Smuzhiyun if (r == 2) {
255*4882a593Smuzhiyun zynqhdr->register_init[reg_count] = reginit;
256*4882a593Smuzhiyun ++reg_count;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
259*4882a593Smuzhiyun } while ((r != EOF) && (reg_count < HEADER_REGINITS));
260*4882a593Smuzhiyun fclose(fp);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
zynqimage_set_header(void * ptr,struct stat * sbuf,int ifd,struct image_tool_params * params)263*4882a593Smuzhiyun static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
264*4882a593Smuzhiyun struct image_tool_params *params)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
267*4882a593Smuzhiyun zynqimage_default_header(zynqhdr);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* place image directly after header */
270*4882a593Smuzhiyun zynqhdr->image_offset =
271*4882a593Smuzhiyun cpu_to_le32((uint32_t)sizeof(struct zynq_header));
272*4882a593Smuzhiyun zynqhdr->image_size = cpu_to_le32((uint32_t)sbuf->st_size);
273*4882a593Smuzhiyun zynqhdr->image_stored_size = zynqhdr->image_size;
274*4882a593Smuzhiyun zynqhdr->image_load = 0x0;
275*4882a593Smuzhiyun if (params->eflag)
276*4882a593Smuzhiyun zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /* User can pass in text file with init list */
279*4882a593Smuzhiyun if (strlen(params->imagename2))
280*4882a593Smuzhiyun zynqimage_parse_initparams(zynqhdr, params->imagename2);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun zynqhdr->checksum = zynqimage_checksum(zynqhdr);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun U_BOOT_IMAGE_TYPE(
286*4882a593Smuzhiyun zynqimage,
287*4882a593Smuzhiyun "Xilinx Zynq Boot Image support",
288*4882a593Smuzhiyun sizeof(struct zynq_header),
289*4882a593Smuzhiyun (void *)&zynqimage_header,
290*4882a593Smuzhiyun zynqimage_check_params,
291*4882a593Smuzhiyun zynqimage_verify_header,
292*4882a593Smuzhiyun zynqimage_print_header,
293*4882a593Smuzhiyun zynqimage_set_header,
294*4882a593Smuzhiyun NULL,
295*4882a593Smuzhiyun zynqimage_check_image_types,
296*4882a593Smuzhiyun NULL,
297*4882a593Smuzhiyun NULL
298*4882a593Smuzhiyun );
299