xref: /OK3568_Linux_fs/u-boot/tools/imximage.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2009
3*4882a593Smuzhiyun  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (C) Copyright 2008
6*4882a593Smuzhiyun  * Marvell Semiconductor <www.marvell.com>
7*4882a593Smuzhiyun  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "imagetool.h"
13*4882a593Smuzhiyun #include <image.h>
14*4882a593Smuzhiyun #include "imximage.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define UNDEFINED 0xFFFFFFFF
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun  * Supported commands for configuration file
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun static table_entry_t imximage_cmds[] = {
22*4882a593Smuzhiyun 	{CMD_BOOT_FROM,         "BOOT_FROM",            "boot command",	  },
23*4882a593Smuzhiyun 	{CMD_BOOT_OFFSET,       "BOOT_OFFSET",          "Boot offset",	  },
24*4882a593Smuzhiyun 	{CMD_WRITE_DATA,        "DATA",                 "Reg Write Data", },
25*4882a593Smuzhiyun 	{CMD_WRITE_CLR_BIT,     "CLR_BIT",              "Reg clear bit",  },
26*4882a593Smuzhiyun 	{CMD_WRITE_SET_BIT,     "SET_BIT",              "Reg set bit",  },
27*4882a593Smuzhiyun 	{CMD_CHECK_BITS_SET,    "CHECK_BITS_SET",   "Reg Check bits set", },
28*4882a593Smuzhiyun 	{CMD_CHECK_BITS_CLR,    "CHECK_BITS_CLR",   "Reg Check bits clr", },
29*4882a593Smuzhiyun 	{CMD_CSF,               "CSF",           "Command Sequence File", },
30*4882a593Smuzhiyun 	{CMD_IMAGE_VERSION,     "IMAGE_VERSION",        "image version",  },
31*4882a593Smuzhiyun 	{CMD_PLUGIN,            "PLUGIN",               "file plugin_addr",  },
32*4882a593Smuzhiyun 	{-1,                    "",                     "",	          },
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun  * Supported Boot options for configuration file
37*4882a593Smuzhiyun  * this is needed to set the correct flash offset
38*4882a593Smuzhiyun  */
39*4882a593Smuzhiyun static table_entry_t imximage_boot_offset[] = {
40*4882a593Smuzhiyun 	{FLASH_OFFSET_ONENAND,	"onenand",	"OneNAND Flash",},
41*4882a593Smuzhiyun 	{FLASH_OFFSET_NAND,	"nand",		"NAND Flash",	},
42*4882a593Smuzhiyun 	{FLASH_OFFSET_NOR,	"nor",		"NOR Flash",	},
43*4882a593Smuzhiyun 	{FLASH_OFFSET_SATA,	"sata",		"SATA Disk",	},
44*4882a593Smuzhiyun 	{FLASH_OFFSET_SD,	"sd",		"SD Card",	},
45*4882a593Smuzhiyun 	{FLASH_OFFSET_SPI,	"spi",		"SPI Flash",	},
46*4882a593Smuzhiyun 	{FLASH_OFFSET_QSPI,	"qspi",		"QSPI NOR Flash",},
47*4882a593Smuzhiyun 	{-1,			"",		"Invalid",	},
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun  * Supported Boot options for configuration file
52*4882a593Smuzhiyun  * this is needed to determine the initial load size
53*4882a593Smuzhiyun  */
54*4882a593Smuzhiyun static table_entry_t imximage_boot_loadsize[] = {
55*4882a593Smuzhiyun 	{FLASH_LOADSIZE_ONENAND,	"onenand",	"OneNAND Flash",},
56*4882a593Smuzhiyun 	{FLASH_LOADSIZE_NAND,		"nand",		"NAND Flash",	},
57*4882a593Smuzhiyun 	{FLASH_LOADSIZE_NOR,		"nor",		"NOR Flash",	},
58*4882a593Smuzhiyun 	{FLASH_LOADSIZE_SATA,		"sata",		"SATA Disk",	},
59*4882a593Smuzhiyun 	{FLASH_LOADSIZE_SD,		"sd",		"SD Card",	},
60*4882a593Smuzhiyun 	{FLASH_LOADSIZE_SPI,		"spi",		"SPI Flash",	},
61*4882a593Smuzhiyun 	{FLASH_LOADSIZE_QSPI,		"qspi",		"QSPI NOR Flash",},
62*4882a593Smuzhiyun 	{-1,				"",		"Invalid",	},
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /*
66*4882a593Smuzhiyun  * IMXIMAGE version definition for i.MX chips
67*4882a593Smuzhiyun  */
68*4882a593Smuzhiyun static table_entry_t imximage_versions[] = {
69*4882a593Smuzhiyun 	{IMXIMAGE_V1,	"",	" (i.MX25/35/51 compatible)", },
70*4882a593Smuzhiyun 	{IMXIMAGE_V2,	"",	" (i.MX53/6/7 compatible)",   },
71*4882a593Smuzhiyun 	{-1,            "",     " (Invalid)",                 },
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun static struct imx_header imximage_header;
75*4882a593Smuzhiyun static uint32_t imximage_version;
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * Image Vector Table Offset
78*4882a593Smuzhiyun  * Initialized to a wrong not 4-bytes aligned address to
79*4882a593Smuzhiyun  * check if it is was set by the cfg file.
80*4882a593Smuzhiyun  */
81*4882a593Smuzhiyun static uint32_t imximage_ivt_offset = UNDEFINED;
82*4882a593Smuzhiyun static uint32_t imximage_csf_size = UNDEFINED;
83*4882a593Smuzhiyun /* Initial Load Region Size */
84*4882a593Smuzhiyun static uint32_t imximage_init_loadsize;
85*4882a593Smuzhiyun static uint32_t imximage_iram_free_start;
86*4882a593Smuzhiyun static uint32_t imximage_plugin_size;
87*4882a593Smuzhiyun static uint32_t plugin_image;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun static set_dcd_val_t set_dcd_val;
90*4882a593Smuzhiyun static set_dcd_param_t set_dcd_param;
91*4882a593Smuzhiyun static set_dcd_rst_t set_dcd_rst;
92*4882a593Smuzhiyun static set_imx_hdr_t set_imx_hdr;
93*4882a593Smuzhiyun static uint32_t max_dcd_entries;
94*4882a593Smuzhiyun static uint32_t *header_size_ptr;
95*4882a593Smuzhiyun static uint32_t *csf_ptr;
96*4882a593Smuzhiyun 
get_cfg_value(char * token,char * name,int linenr)97*4882a593Smuzhiyun static uint32_t get_cfg_value(char *token, char *name,  int linenr)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	char *endptr;
100*4882a593Smuzhiyun 	uint32_t value;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	errno = 0;
103*4882a593Smuzhiyun 	value = strtoul(token, &endptr, 16);
104*4882a593Smuzhiyun 	if (errno || (token == endptr)) {
105*4882a593Smuzhiyun 		fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
106*4882a593Smuzhiyun 			name,  linenr, token);
107*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 	return value;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
detect_imximage_version(struct imx_header * imx_hdr)112*4882a593Smuzhiyun static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
115*4882a593Smuzhiyun 	imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
116*4882a593Smuzhiyun 	flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
117*4882a593Smuzhiyun 	flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	/* Try to detect V1 */
120*4882a593Smuzhiyun 	if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
121*4882a593Smuzhiyun 		(hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
122*4882a593Smuzhiyun 		return IMXIMAGE_V1;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* Try to detect V2 */
125*4882a593Smuzhiyun 	if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
126*4882a593Smuzhiyun 		(hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
127*4882a593Smuzhiyun 		return IMXIMAGE_V2;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
130*4882a593Smuzhiyun 	    hdr_v2->boot_data.plugin)
131*4882a593Smuzhiyun 		return IMXIMAGE_V2;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return IMXIMAGE_VER_INVALID;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
err_imximage_version(int version)136*4882a593Smuzhiyun static void err_imximage_version(int version)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	fprintf(stderr,
139*4882a593Smuzhiyun 		"Error: Unsupported imximage version:%d\n", version);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	exit(EXIT_FAILURE);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun 
set_dcd_val_v1(struct imx_header * imxhdr,char * name,int lineno,int fld,uint32_t value,uint32_t off)144*4882a593Smuzhiyun static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
145*4882a593Smuzhiyun 					int fld, uint32_t value, uint32_t off)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	switch (fld) {
150*4882a593Smuzhiyun 	case CFG_REG_SIZE:
151*4882a593Smuzhiyun 		/* Byte, halfword, word */
152*4882a593Smuzhiyun 		if ((value != 1) && (value != 2) && (value != 4)) {
153*4882a593Smuzhiyun 			fprintf(stderr, "Error: %s[%d] - "
154*4882a593Smuzhiyun 				"Invalid register size " "(%d)\n",
155*4882a593Smuzhiyun 				name, lineno, value);
156*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
157*4882a593Smuzhiyun 		}
158*4882a593Smuzhiyun 		dcd_v1->addr_data[off].type = value;
159*4882a593Smuzhiyun 		break;
160*4882a593Smuzhiyun 	case CFG_REG_ADDRESS:
161*4882a593Smuzhiyun 		dcd_v1->addr_data[off].addr = value;
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	case CFG_REG_VALUE:
164*4882a593Smuzhiyun 		dcd_v1->addr_data[off].value = value;
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	default:
167*4882a593Smuzhiyun 		break;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static struct dcd_v2_cmd *gd_last_cmd;
173*4882a593Smuzhiyun 
set_dcd_param_v2(struct imx_header * imxhdr,uint32_t dcd_len,int32_t cmd)174*4882a593Smuzhiyun static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
175*4882a593Smuzhiyun 		int32_t cmd)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
178*4882a593Smuzhiyun 	struct dcd_v2_cmd *d = gd_last_cmd;
179*4882a593Smuzhiyun 	struct dcd_v2_cmd *d2;
180*4882a593Smuzhiyun 	int len;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	if (!d)
183*4882a593Smuzhiyun 		d = &dcd_v2->dcd_cmd;
184*4882a593Smuzhiyun 	d2 = d;
185*4882a593Smuzhiyun 	len = be16_to_cpu(d->write_dcd_command.length);
186*4882a593Smuzhiyun 	if (len > 4)
187*4882a593Smuzhiyun 		d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	switch (cmd) {
190*4882a593Smuzhiyun 	case CMD_WRITE_DATA:
191*4882a593Smuzhiyun 		if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
192*4882a593Smuzhiyun 		    (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
193*4882a593Smuzhiyun 			break;
194*4882a593Smuzhiyun 		d = d2;
195*4882a593Smuzhiyun 		d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
196*4882a593Smuzhiyun 		d->write_dcd_command.length = cpu_to_be16(4);
197*4882a593Smuzhiyun 		d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
198*4882a593Smuzhiyun 		break;
199*4882a593Smuzhiyun 	case CMD_WRITE_CLR_BIT:
200*4882a593Smuzhiyun 		if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
201*4882a593Smuzhiyun 		    (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
202*4882a593Smuzhiyun 			break;
203*4882a593Smuzhiyun 		d = d2;
204*4882a593Smuzhiyun 		d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
205*4882a593Smuzhiyun 		d->write_dcd_command.length = cpu_to_be16(4);
206*4882a593Smuzhiyun 		d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
207*4882a593Smuzhiyun 		break;
208*4882a593Smuzhiyun 	case CMD_WRITE_SET_BIT:
209*4882a593Smuzhiyun 		if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
210*4882a593Smuzhiyun 		    (d->write_dcd_command.param == DCD_WRITE_SET_BIT_PARAM))
211*4882a593Smuzhiyun 			break;
212*4882a593Smuzhiyun 		d = d2;
213*4882a593Smuzhiyun 		d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
214*4882a593Smuzhiyun 		d->write_dcd_command.length = cpu_to_be16(4);
215*4882a593Smuzhiyun 		d->write_dcd_command.param = DCD_WRITE_SET_BIT_PARAM;
216*4882a593Smuzhiyun 		break;
217*4882a593Smuzhiyun 	/*
218*4882a593Smuzhiyun 	 * Check data command only supports one entry,
219*4882a593Smuzhiyun 	 */
220*4882a593Smuzhiyun 	case CMD_CHECK_BITS_SET:
221*4882a593Smuzhiyun 		d = d2;
222*4882a593Smuzhiyun 		d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
223*4882a593Smuzhiyun 		d->write_dcd_command.length = cpu_to_be16(4);
224*4882a593Smuzhiyun 		d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
225*4882a593Smuzhiyun 		break;
226*4882a593Smuzhiyun 	case CMD_CHECK_BITS_CLR:
227*4882a593Smuzhiyun 		d = d2;
228*4882a593Smuzhiyun 		d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
229*4882a593Smuzhiyun 		d->write_dcd_command.length = cpu_to_be16(4);
230*4882a593Smuzhiyun 		d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
231*4882a593Smuzhiyun 		break;
232*4882a593Smuzhiyun 	default:
233*4882a593Smuzhiyun 		break;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 	gd_last_cmd = d;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun 
set_dcd_val_v2(struct imx_header * imxhdr,char * name,int lineno,int fld,uint32_t value,uint32_t off)238*4882a593Smuzhiyun static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
239*4882a593Smuzhiyun 					int fld, uint32_t value, uint32_t off)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct dcd_v2_cmd *d = gd_last_cmd;
242*4882a593Smuzhiyun 	int len;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	len = be16_to_cpu(d->write_dcd_command.length);
245*4882a593Smuzhiyun 	off = (len - 4) >> 3;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	switch (fld) {
248*4882a593Smuzhiyun 	case CFG_REG_ADDRESS:
249*4882a593Smuzhiyun 		d->addr_data[off].addr = cpu_to_be32(value);
250*4882a593Smuzhiyun 		break;
251*4882a593Smuzhiyun 	case CFG_REG_VALUE:
252*4882a593Smuzhiyun 		d->addr_data[off].value = cpu_to_be32(value);
253*4882a593Smuzhiyun 		off++;
254*4882a593Smuzhiyun 		d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
255*4882a593Smuzhiyun 		break;
256*4882a593Smuzhiyun 	default:
257*4882a593Smuzhiyun 		break;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun /*
263*4882a593Smuzhiyun  * Complete setting up the rest field of DCD of V1
264*4882a593Smuzhiyun  * such as barker code and DCD data length.
265*4882a593Smuzhiyun  */
set_dcd_rst_v1(struct imx_header * imxhdr,uint32_t dcd_len,char * name,int lineno)266*4882a593Smuzhiyun static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
267*4882a593Smuzhiyun 						char *name, int lineno)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	dcd_v1->preamble.barker = DCD_BARKER;
272*4882a593Smuzhiyun 	dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /*
276*4882a593Smuzhiyun  * Complete setting up the reset field of DCD of V2
277*4882a593Smuzhiyun  * such as DCD tag, version, length, etc.
278*4882a593Smuzhiyun  */
set_dcd_rst_v2(struct imx_header * imxhdr,uint32_t dcd_len,char * name,int lineno)279*4882a593Smuzhiyun static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
280*4882a593Smuzhiyun 						char *name, int lineno)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	if (!imxhdr->header.hdr_v2.boot_data.plugin) {
283*4882a593Smuzhiyun 		dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
284*4882a593Smuzhiyun 		struct dcd_v2_cmd *d = gd_last_cmd;
285*4882a593Smuzhiyun 		int len;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 		if (!d)
288*4882a593Smuzhiyun 			d = &dcd_v2->dcd_cmd;
289*4882a593Smuzhiyun 		len = be16_to_cpu(d->write_dcd_command.length);
290*4882a593Smuzhiyun 		if (len > 4)
291*4882a593Smuzhiyun 			d = (struct dcd_v2_cmd *)(((char *)d) + len);
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 		len = (char *)d - (char *)&dcd_v2->header;
294*4882a593Smuzhiyun 		dcd_v2->header.tag = DCD_HEADER_TAG;
295*4882a593Smuzhiyun 		dcd_v2->header.length = cpu_to_be16(len);
296*4882a593Smuzhiyun 		dcd_v2->header.version = DCD_VERSION;
297*4882a593Smuzhiyun 	}
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
set_imx_hdr_v1(struct imx_header * imxhdr,uint32_t dcd_len,uint32_t entry_point,uint32_t flash_offset)300*4882a593Smuzhiyun static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
301*4882a593Smuzhiyun 		uint32_t entry_point, uint32_t flash_offset)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
304*4882a593Smuzhiyun 	flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
305*4882a593Smuzhiyun 	dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
306*4882a593Smuzhiyun 	uint32_t hdr_base;
307*4882a593Smuzhiyun 	uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
308*4882a593Smuzhiyun 			- ((char *)imxhdr));
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	/* Set magic number */
311*4882a593Smuzhiyun 	fhdr_v1->app_code_barker = APP_CODE_BARKER;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	hdr_base = entry_point - imximage_init_loadsize + flash_offset;
314*4882a593Smuzhiyun 	fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
315*4882a593Smuzhiyun 	fhdr_v1->app_code_jump_vector = entry_point;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
318*4882a593Smuzhiyun 	fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	/* Security feature are not supported */
321*4882a593Smuzhiyun 	fhdr_v1->app_code_csf = 0;
322*4882a593Smuzhiyun 	fhdr_v1->super_root_key = 0;
323*4882a593Smuzhiyun 	header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun 
set_imx_hdr_v2(struct imx_header * imxhdr,uint32_t dcd_len,uint32_t entry_point,uint32_t flash_offset)326*4882a593Smuzhiyun static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
327*4882a593Smuzhiyun 		uint32_t entry_point, uint32_t flash_offset)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun 	imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
330*4882a593Smuzhiyun 	flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
331*4882a593Smuzhiyun 	uint32_t hdr_base;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	/* Set magic number */
334*4882a593Smuzhiyun 	fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
335*4882a593Smuzhiyun 	fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
336*4882a593Smuzhiyun 	fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	if (!hdr_v2->boot_data.plugin) {
339*4882a593Smuzhiyun 		fhdr_v2->entry = entry_point;
340*4882a593Smuzhiyun 		fhdr_v2->reserved1 = 0;
341*4882a593Smuzhiyun 		fhdr_v2->reserved1 = 0;
342*4882a593Smuzhiyun 		hdr_base = entry_point - imximage_init_loadsize +
343*4882a593Smuzhiyun 			flash_offset;
344*4882a593Smuzhiyun 		fhdr_v2->self = hdr_base;
345*4882a593Smuzhiyun 		if (dcd_len > 0)
346*4882a593Smuzhiyun 			fhdr_v2->dcd_ptr = hdr_base +
347*4882a593Smuzhiyun 				offsetof(imx_header_v2_t, data);
348*4882a593Smuzhiyun 		else
349*4882a593Smuzhiyun 			fhdr_v2->dcd_ptr = 0;
350*4882a593Smuzhiyun 		fhdr_v2->boot_data_ptr = hdr_base
351*4882a593Smuzhiyun 				+ offsetof(imx_header_v2_t, boot_data);
352*4882a593Smuzhiyun 		hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 		fhdr_v2->csf = 0;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 		header_size_ptr = &hdr_v2->boot_data.size;
357*4882a593Smuzhiyun 		csf_ptr = &fhdr_v2->csf;
358*4882a593Smuzhiyun 	} else {
359*4882a593Smuzhiyun 		imx_header_v2_t *next_hdr_v2;
360*4882a593Smuzhiyun 		flash_header_v2_t *next_fhdr_v2;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 		if (imximage_csf_size != 0) {
363*4882a593Smuzhiyun 			fprintf(stderr, "Error: Header v2: SECURE_BOOT is only supported in DCD mode!");
364*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
365*4882a593Smuzhiyun 		}
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 		fhdr_v2->entry = imximage_iram_free_start +
368*4882a593Smuzhiyun 			flash_offset + sizeof(flash_header_v2_t) +
369*4882a593Smuzhiyun 			sizeof(boot_data_t);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 		fhdr_v2->reserved1 = 0;
372*4882a593Smuzhiyun 		fhdr_v2->reserved2 = 0;
373*4882a593Smuzhiyun 		fhdr_v2->self = imximage_iram_free_start + flash_offset;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 		fhdr_v2->dcd_ptr = 0;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 		fhdr_v2->boot_data_ptr = fhdr_v2->self +
378*4882a593Smuzhiyun 				offsetof(imx_header_v2_t, boot_data);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 		hdr_v2->boot_data.start = imximage_iram_free_start;
381*4882a593Smuzhiyun 		/*
382*4882a593Smuzhiyun 		 * The actural size of plugin image is "imximage_plugin_size +
383*4882a593Smuzhiyun 		 * sizeof(flash_header_v2_t) + sizeof(boot_data_t)", plus the
384*4882a593Smuzhiyun 		 * flash_offset space.The ROM code only need to copy this size
385*4882a593Smuzhiyun 		 * to run the plugin code. However, later when copy the whole
386*4882a593Smuzhiyun 		 * U-Boot image to DDR, the ROM code use memcpy to copy the
387*4882a593Smuzhiyun 		 * first part of the image, and use the storage read function
388*4882a593Smuzhiyun 		 * to get the remaining part. This requires the dividing point
389*4882a593Smuzhiyun 		 * must be multiple of storage sector size. Here we set the
390*4882a593Smuzhiyun 		 * first section to be MAX_PLUGIN_CODE_SIZE(64KB) for this
391*4882a593Smuzhiyun 		 * purpose.
392*4882a593Smuzhiyun 		 */
393*4882a593Smuzhiyun 		hdr_v2->boot_data.size = MAX_PLUGIN_CODE_SIZE;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 		/* Security feature are not supported */
396*4882a593Smuzhiyun 		fhdr_v2->csf = 0;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 		next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
399*4882a593Smuzhiyun 			       imximage_plugin_size);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 		next_fhdr_v2 = &next_hdr_v2->fhdr;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 		next_fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
404*4882a593Smuzhiyun 		next_fhdr_v2->header.length =
405*4882a593Smuzhiyun 			cpu_to_be16(sizeof(flash_header_v2_t));
406*4882a593Smuzhiyun 		next_fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 		next_fhdr_v2->entry = entry_point;
409*4882a593Smuzhiyun 		hdr_base = entry_point - sizeof(struct imx_header);
410*4882a593Smuzhiyun 		next_fhdr_v2->reserved1 = 0;
411*4882a593Smuzhiyun 		next_fhdr_v2->reserved2 = 0;
412*4882a593Smuzhiyun 		next_fhdr_v2->self = hdr_base + imximage_plugin_size;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 		next_fhdr_v2->dcd_ptr = 0;
415*4882a593Smuzhiyun 		next_fhdr_v2->boot_data_ptr = next_fhdr_v2->self +
416*4882a593Smuzhiyun 				offsetof(imx_header_v2_t, boot_data);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 		next_hdr_v2->boot_data.start = hdr_base - flash_offset;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 		header_size_ptr = &next_hdr_v2->boot_data.size;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 		next_hdr_v2->boot_data.plugin = 0;
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 		next_fhdr_v2->csf = 0;
425*4882a593Smuzhiyun 	}
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun 
set_hdr_func(void)428*4882a593Smuzhiyun static void set_hdr_func(void)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun 	switch (imximage_version) {
431*4882a593Smuzhiyun 	case IMXIMAGE_V1:
432*4882a593Smuzhiyun 		set_dcd_val = set_dcd_val_v1;
433*4882a593Smuzhiyun 		set_dcd_param = NULL;
434*4882a593Smuzhiyun 		set_dcd_rst = set_dcd_rst_v1;
435*4882a593Smuzhiyun 		set_imx_hdr = set_imx_hdr_v1;
436*4882a593Smuzhiyun 		max_dcd_entries = MAX_HW_CFG_SIZE_V1;
437*4882a593Smuzhiyun 		break;
438*4882a593Smuzhiyun 	case IMXIMAGE_V2:
439*4882a593Smuzhiyun 		gd_last_cmd = NULL;
440*4882a593Smuzhiyun 		set_dcd_val = set_dcd_val_v2;
441*4882a593Smuzhiyun 		set_dcd_param = set_dcd_param_v2;
442*4882a593Smuzhiyun 		set_dcd_rst = set_dcd_rst_v2;
443*4882a593Smuzhiyun 		set_imx_hdr = set_imx_hdr_v2;
444*4882a593Smuzhiyun 		max_dcd_entries = MAX_HW_CFG_SIZE_V2;
445*4882a593Smuzhiyun 		break;
446*4882a593Smuzhiyun 	default:
447*4882a593Smuzhiyun 		err_imximage_version(imximage_version);
448*4882a593Smuzhiyun 		break;
449*4882a593Smuzhiyun 	}
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
print_hdr_v1(struct imx_header * imx_hdr)452*4882a593Smuzhiyun static void print_hdr_v1(struct imx_header *imx_hdr)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun 	imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
455*4882a593Smuzhiyun 	flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
456*4882a593Smuzhiyun 	dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
457*4882a593Smuzhiyun 	uint32_t size, length, ver;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	size = dcd_v1->preamble.length;
460*4882a593Smuzhiyun 	if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
461*4882a593Smuzhiyun 		fprintf(stderr,
462*4882a593Smuzhiyun 			"Error: Image corrupt DCD size %d exceed maximum %d\n",
463*4882a593Smuzhiyun 			(uint32_t)(size / sizeof(dcd_type_addr_data_t)),
464*4882a593Smuzhiyun 			MAX_HW_CFG_SIZE_V1);
465*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
466*4882a593Smuzhiyun 	}
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
469*4882a593Smuzhiyun 	ver = detect_imximage_version(imx_hdr);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	printf("Image Type:   Freescale IMX Boot Image\n");
472*4882a593Smuzhiyun 	printf("Image Ver:    %x", ver);
473*4882a593Smuzhiyun 	printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
474*4882a593Smuzhiyun 	printf("Data Size:    ");
475*4882a593Smuzhiyun 	genimg_print_size(dcd_v1->addr_data[length].type);
476*4882a593Smuzhiyun 	printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
477*4882a593Smuzhiyun 	printf("Entry Point:  %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun 
print_hdr_v2(struct imx_header * imx_hdr)480*4882a593Smuzhiyun static void print_hdr_v2(struct imx_header *imx_hdr)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
483*4882a593Smuzhiyun 	flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
484*4882a593Smuzhiyun 	dcd_v2_t *dcd_v2 = &hdr_v2->data.dcd_table;
485*4882a593Smuzhiyun 	uint32_t size, version, plugin;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	plugin = hdr_v2->boot_data.plugin;
488*4882a593Smuzhiyun 	if (!plugin) {
489*4882a593Smuzhiyun 		size = be16_to_cpu(dcd_v2->header.length);
490*4882a593Smuzhiyun 		if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
491*4882a593Smuzhiyun 			fprintf(stderr,
492*4882a593Smuzhiyun 				"Error: Image corrupt DCD size %d exceed maximum %d\n",
493*4882a593Smuzhiyun 				(uint32_t)(size / sizeof(dcd_addr_data_t)),
494*4882a593Smuzhiyun 				MAX_HW_CFG_SIZE_V2);
495*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
496*4882a593Smuzhiyun 		}
497*4882a593Smuzhiyun 	}
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	version = detect_imximage_version(imx_hdr);
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	printf("Image Type:   Freescale IMX Boot Image\n");
502*4882a593Smuzhiyun 	printf("Image Ver:    %x", version);
503*4882a593Smuzhiyun 	printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
504*4882a593Smuzhiyun 	printf("Mode:         %s\n", plugin ? "PLUGIN" : "DCD");
505*4882a593Smuzhiyun 	if (!plugin) {
506*4882a593Smuzhiyun 		printf("Data Size:    ");
507*4882a593Smuzhiyun 		genimg_print_size(hdr_v2->boot_data.size);
508*4882a593Smuzhiyun 		printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
509*4882a593Smuzhiyun 		printf("Entry Point:  %08x\n", (uint32_t)fhdr_v2->entry);
510*4882a593Smuzhiyun 		if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
511*4882a593Smuzhiyun 		    (imximage_csf_size != UNDEFINED)) {
512*4882a593Smuzhiyun 			uint16_t dcdlen;
513*4882a593Smuzhiyun 			int offs;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 			dcdlen = hdr_v2->data.dcd_table.header.length;
516*4882a593Smuzhiyun 			offs = (char *)&hdr_v2->data.dcd_table
517*4882a593Smuzhiyun 				- (char *)hdr_v2;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 			printf("HAB Blocks:   %08x %08x %08x\n",
520*4882a593Smuzhiyun 			       (uint32_t)fhdr_v2->self, 0,
521*4882a593Smuzhiyun 			       hdr_v2->boot_data.size - imximage_ivt_offset -
522*4882a593Smuzhiyun 			       imximage_csf_size);
523*4882a593Smuzhiyun 			printf("DCD Blocks:   00910000 %08x %08x\n",
524*4882a593Smuzhiyun 			       offs, be16_to_cpu(dcdlen));
525*4882a593Smuzhiyun 		}
526*4882a593Smuzhiyun 	} else {
527*4882a593Smuzhiyun 		imx_header_v2_t *next_hdr_v2;
528*4882a593Smuzhiyun 		flash_header_v2_t *next_fhdr_v2;
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 		/*First Header*/
531*4882a593Smuzhiyun 		printf("Plugin Data Size:     ");
532*4882a593Smuzhiyun 		genimg_print_size(hdr_v2->boot_data.size);
533*4882a593Smuzhiyun 		printf("Plugin Code Size:     ");
534*4882a593Smuzhiyun 		genimg_print_size(imximage_plugin_size);
535*4882a593Smuzhiyun 		printf("Plugin Load Address:  %08x\n", hdr_v2->boot_data.start);
536*4882a593Smuzhiyun 		printf("Plugin Entry Point:   %08x\n", (uint32_t)fhdr_v2->entry);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 		/*Second Header*/
539*4882a593Smuzhiyun 		next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
540*4882a593Smuzhiyun 				imximage_plugin_size);
541*4882a593Smuzhiyun 		next_fhdr_v2 = &next_hdr_v2->fhdr;
542*4882a593Smuzhiyun 		printf("U-Boot Data Size:     ");
543*4882a593Smuzhiyun 		genimg_print_size(next_hdr_v2->boot_data.size);
544*4882a593Smuzhiyun 		printf("U-Boot Load Address:  %08x\n",
545*4882a593Smuzhiyun 		       next_hdr_v2->boot_data.start);
546*4882a593Smuzhiyun 		printf("U-Boot Entry Point:   %08x\n",
547*4882a593Smuzhiyun 		       (uint32_t)next_fhdr_v2->entry);
548*4882a593Smuzhiyun 	}
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun 
copy_plugin_code(struct imx_header * imxhdr,char * plugin_file)551*4882a593Smuzhiyun static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun 	int ifd;
554*4882a593Smuzhiyun 	struct stat sbuf;
555*4882a593Smuzhiyun 	char *plugin_buf = imxhdr->header.hdr_v2.data.plugin_code;
556*4882a593Smuzhiyun 	char *ptr;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 	ifd = open(plugin_file, O_RDONLY|O_BINARY);
559*4882a593Smuzhiyun 	if (ifd < 0) {
560*4882a593Smuzhiyun 		fprintf(stderr, "Can't open %s: %s\n",
561*4882a593Smuzhiyun 			plugin_file,
562*4882a593Smuzhiyun 			strerror(errno));
563*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
564*4882a593Smuzhiyun 	}
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	if (fstat(ifd, &sbuf) < 0) {
567*4882a593Smuzhiyun 		fprintf(stderr, "Can't stat %s: %s\n",
568*4882a593Smuzhiyun 			plugin_file,
569*4882a593Smuzhiyun 			strerror(errno));
570*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
571*4882a593Smuzhiyun 	}
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0);
574*4882a593Smuzhiyun 	if (ptr == MAP_FAILED) {
575*4882a593Smuzhiyun 		fprintf(stderr, "Can't read %s: %s\n",
576*4882a593Smuzhiyun 			plugin_file,
577*4882a593Smuzhiyun 			strerror(errno));
578*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
579*4882a593Smuzhiyun 	}
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	if (sbuf.st_size > MAX_PLUGIN_CODE_SIZE) {
582*4882a593Smuzhiyun 		printf("plugin binary size too large\n");
583*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
584*4882a593Smuzhiyun 	}
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	memcpy(plugin_buf, ptr, sbuf.st_size);
587*4882a593Smuzhiyun 	imximage_plugin_size = sbuf.st_size;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	(void) munmap((void *)ptr, sbuf.st_size);
590*4882a593Smuzhiyun 	(void) close(ifd);
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	imxhdr->header.hdr_v2.boot_data.plugin = 1;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun 
parse_cfg_cmd(struct imx_header * imxhdr,int32_t cmd,char * token,char * name,int lineno,int fld,int dcd_len)595*4882a593Smuzhiyun static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
596*4882a593Smuzhiyun 				char *name, int lineno, int fld, int dcd_len)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun 	int value;
599*4882a593Smuzhiyun 	static int cmd_ver_first = ~0;
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	switch (cmd) {
602*4882a593Smuzhiyun 	case CMD_IMAGE_VERSION:
603*4882a593Smuzhiyun 		imximage_version = get_cfg_value(token, name, lineno);
604*4882a593Smuzhiyun 		if (cmd_ver_first == 0) {
605*4882a593Smuzhiyun 			fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
606*4882a593Smuzhiyun 				"command need be the first before other "
607*4882a593Smuzhiyun 				"valid command in the file\n", name, lineno);
608*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
609*4882a593Smuzhiyun 		}
610*4882a593Smuzhiyun 		cmd_ver_first = 1;
611*4882a593Smuzhiyun 		set_hdr_func();
612*4882a593Smuzhiyun 		break;
613*4882a593Smuzhiyun 	case CMD_BOOT_FROM:
614*4882a593Smuzhiyun 		imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
615*4882a593Smuzhiyun 					"imximage boot option", token);
616*4882a593Smuzhiyun 		if (imximage_ivt_offset == -1) {
617*4882a593Smuzhiyun 			fprintf(stderr, "Error: %s[%d] -Invalid boot device"
618*4882a593Smuzhiyun 				"(%s)\n", name, lineno, token);
619*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
620*4882a593Smuzhiyun 		}
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 		imximage_init_loadsize =
623*4882a593Smuzhiyun 			get_table_entry_id(imximage_boot_loadsize,
624*4882a593Smuzhiyun 					   "imximage boot option", token);
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 		if (imximage_init_loadsize == -1) {
627*4882a593Smuzhiyun 			fprintf(stderr,
628*4882a593Smuzhiyun 				"Error: %s[%d] -Invalid boot device(%s)\n",
629*4882a593Smuzhiyun 				name, lineno, token);
630*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
631*4882a593Smuzhiyun 		}
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 		/*
634*4882a593Smuzhiyun 		 * The SOC loads from the storage starting at address 0
635*4882a593Smuzhiyun 		 * then ensures that the load size contains the offset
636*4882a593Smuzhiyun 		 */
637*4882a593Smuzhiyun 		if (imximage_init_loadsize < imximage_ivt_offset)
638*4882a593Smuzhiyun 			imximage_init_loadsize = imximage_ivt_offset;
639*4882a593Smuzhiyun 		if (unlikely(cmd_ver_first != 1))
640*4882a593Smuzhiyun 			cmd_ver_first = 0;
641*4882a593Smuzhiyun 		break;
642*4882a593Smuzhiyun 	case CMD_BOOT_OFFSET:
643*4882a593Smuzhiyun 		imximage_ivt_offset = get_cfg_value(token, name, lineno);
644*4882a593Smuzhiyun 		if (unlikely(cmd_ver_first != 1))
645*4882a593Smuzhiyun 			cmd_ver_first = 0;
646*4882a593Smuzhiyun 		break;
647*4882a593Smuzhiyun 	case CMD_WRITE_DATA:
648*4882a593Smuzhiyun 	case CMD_WRITE_CLR_BIT:
649*4882a593Smuzhiyun 	case CMD_WRITE_SET_BIT:
650*4882a593Smuzhiyun 	case CMD_CHECK_BITS_SET:
651*4882a593Smuzhiyun 	case CMD_CHECK_BITS_CLR:
652*4882a593Smuzhiyun 		value = get_cfg_value(token, name, lineno);
653*4882a593Smuzhiyun 		if (set_dcd_param)
654*4882a593Smuzhiyun 			(*set_dcd_param)(imxhdr, dcd_len, cmd);
655*4882a593Smuzhiyun 		(*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
656*4882a593Smuzhiyun 		if (unlikely(cmd_ver_first != 1))
657*4882a593Smuzhiyun 			cmd_ver_first = 0;
658*4882a593Smuzhiyun 		break;
659*4882a593Smuzhiyun 	case CMD_CSF:
660*4882a593Smuzhiyun 		if (imximage_version != 2) {
661*4882a593Smuzhiyun 			fprintf(stderr,
662*4882a593Smuzhiyun 				"Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
663*4882a593Smuzhiyun 				name, lineno, token);
664*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
665*4882a593Smuzhiyun 		}
666*4882a593Smuzhiyun 		imximage_csf_size = get_cfg_value(token, name, lineno);
667*4882a593Smuzhiyun 		if (unlikely(cmd_ver_first != 1))
668*4882a593Smuzhiyun 			cmd_ver_first = 0;
669*4882a593Smuzhiyun 		break;
670*4882a593Smuzhiyun 	case CMD_PLUGIN:
671*4882a593Smuzhiyun 		plugin_image = 1;
672*4882a593Smuzhiyun 		copy_plugin_code(imxhdr, token);
673*4882a593Smuzhiyun 		break;
674*4882a593Smuzhiyun 	}
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun 
parse_cfg_fld(struct imx_header * imxhdr,int32_t * cmd,char * token,char * name,int lineno,int fld,int * dcd_len)677*4882a593Smuzhiyun static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
678*4882a593Smuzhiyun 		char *token, char *name, int lineno, int fld, int *dcd_len)
679*4882a593Smuzhiyun {
680*4882a593Smuzhiyun 	int value;
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	switch (fld) {
683*4882a593Smuzhiyun 	case CFG_COMMAND:
684*4882a593Smuzhiyun 		*cmd = get_table_entry_id(imximage_cmds,
685*4882a593Smuzhiyun 			"imximage commands", token);
686*4882a593Smuzhiyun 		if (*cmd < 0) {
687*4882a593Smuzhiyun 			fprintf(stderr, "Error: %s[%d] - Invalid command"
688*4882a593Smuzhiyun 			"(%s)\n", name, lineno, token);
689*4882a593Smuzhiyun 			exit(EXIT_FAILURE);
690*4882a593Smuzhiyun 		}
691*4882a593Smuzhiyun 		break;
692*4882a593Smuzhiyun 	case CFG_REG_SIZE:
693*4882a593Smuzhiyun 		parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
694*4882a593Smuzhiyun 		break;
695*4882a593Smuzhiyun 	case CFG_REG_ADDRESS:
696*4882a593Smuzhiyun 	case CFG_REG_VALUE:
697*4882a593Smuzhiyun 		switch(*cmd) {
698*4882a593Smuzhiyun 		case CMD_WRITE_DATA:
699*4882a593Smuzhiyun 		case CMD_WRITE_CLR_BIT:
700*4882a593Smuzhiyun 		case CMD_WRITE_SET_BIT:
701*4882a593Smuzhiyun 		case CMD_CHECK_BITS_SET:
702*4882a593Smuzhiyun 		case CMD_CHECK_BITS_CLR:
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 			value = get_cfg_value(token, name, lineno);
705*4882a593Smuzhiyun 			if (set_dcd_param)
706*4882a593Smuzhiyun 				(*set_dcd_param)(imxhdr, *dcd_len, *cmd);
707*4882a593Smuzhiyun 			(*set_dcd_val)(imxhdr, name, lineno, fld, value,
708*4882a593Smuzhiyun 					*dcd_len);
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun 			if (fld == CFG_REG_VALUE) {
711*4882a593Smuzhiyun 				(*dcd_len)++;
712*4882a593Smuzhiyun 				if (*dcd_len > max_dcd_entries) {
713*4882a593Smuzhiyun 					fprintf(stderr, "Error: %s[%d] -"
714*4882a593Smuzhiyun 						"DCD table exceeds maximum size(%d)\n",
715*4882a593Smuzhiyun 						name, lineno, max_dcd_entries);
716*4882a593Smuzhiyun 					exit(EXIT_FAILURE);
717*4882a593Smuzhiyun 				}
718*4882a593Smuzhiyun 			}
719*4882a593Smuzhiyun 			break;
720*4882a593Smuzhiyun 		case CMD_PLUGIN:
721*4882a593Smuzhiyun 			value = get_cfg_value(token, name, lineno);
722*4882a593Smuzhiyun 			imximage_iram_free_start = value;
723*4882a593Smuzhiyun 			break;
724*4882a593Smuzhiyun 		default:
725*4882a593Smuzhiyun 			break;
726*4882a593Smuzhiyun 		}
727*4882a593Smuzhiyun 		break;
728*4882a593Smuzhiyun 	default:
729*4882a593Smuzhiyun 		break;
730*4882a593Smuzhiyun 	}
731*4882a593Smuzhiyun }
parse_cfg_file(struct imx_header * imxhdr,char * name)732*4882a593Smuzhiyun static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
733*4882a593Smuzhiyun {
734*4882a593Smuzhiyun 	FILE *fd = NULL;
735*4882a593Smuzhiyun 	char *line = NULL;
736*4882a593Smuzhiyun 	char *token, *saveptr1, *saveptr2;
737*4882a593Smuzhiyun 	int lineno = 0;
738*4882a593Smuzhiyun 	int fld;
739*4882a593Smuzhiyun 	size_t len;
740*4882a593Smuzhiyun 	int dcd_len = 0;
741*4882a593Smuzhiyun 	int32_t cmd;
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun 	fd = fopen(name, "r");
744*4882a593Smuzhiyun 	if (fd == 0) {
745*4882a593Smuzhiyun 		fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
746*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
747*4882a593Smuzhiyun 	}
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	/*
750*4882a593Smuzhiyun 	 * Very simple parsing, line starting with # are comments
751*4882a593Smuzhiyun 	 * and are dropped
752*4882a593Smuzhiyun 	 */
753*4882a593Smuzhiyun 	while ((getline(&line, &len, fd)) > 0) {
754*4882a593Smuzhiyun 		lineno++;
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun 		token = strtok_r(line, "\r\n", &saveptr1);
757*4882a593Smuzhiyun 		if (token == NULL)
758*4882a593Smuzhiyun 			continue;
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun 		/* Check inside the single line */
761*4882a593Smuzhiyun 		for (fld = CFG_COMMAND, cmd = CMD_INVALID,
762*4882a593Smuzhiyun 				line = token; ; line = NULL, fld++) {
763*4882a593Smuzhiyun 			token = strtok_r(line, " \t", &saveptr2);
764*4882a593Smuzhiyun 			if (token == NULL)
765*4882a593Smuzhiyun 				break;
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun 			/* Drop all text starting with '#' as comments */
768*4882a593Smuzhiyun 			if (token[0] == '#')
769*4882a593Smuzhiyun 				break;
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 			parse_cfg_fld(imxhdr, &cmd, token, name,
772*4882a593Smuzhiyun 					lineno, fld, &dcd_len);
773*4882a593Smuzhiyun 		}
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	}
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	(*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
778*4882a593Smuzhiyun 	fclose(fd);
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	/* Exit if there is no BOOT_FROM field specifying the flash_offset */
781*4882a593Smuzhiyun 	if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
782*4882a593Smuzhiyun 		fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
783*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
784*4882a593Smuzhiyun 	}
785*4882a593Smuzhiyun 	return dcd_len;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 
imximage_check_image_types(uint8_t type)789*4882a593Smuzhiyun static int imximage_check_image_types(uint8_t type)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun 	if (type == IH_TYPE_IMXIMAGE)
792*4882a593Smuzhiyun 		return EXIT_SUCCESS;
793*4882a593Smuzhiyun 	else
794*4882a593Smuzhiyun 		return EXIT_FAILURE;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun 
imximage_verify_header(unsigned char * ptr,int image_size,struct image_tool_params * params)797*4882a593Smuzhiyun static int imximage_verify_header(unsigned char *ptr, int image_size,
798*4882a593Smuzhiyun 			struct image_tool_params *params)
799*4882a593Smuzhiyun {
800*4882a593Smuzhiyun 	struct imx_header *imx_hdr = (struct imx_header *) ptr;
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
803*4882a593Smuzhiyun 		return -FDT_ERR_BADSTRUCTURE;
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	return 0;
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun 
imximage_print_header(const void * ptr)808*4882a593Smuzhiyun static void imximage_print_header(const void *ptr)
809*4882a593Smuzhiyun {
810*4882a593Smuzhiyun 	struct imx_header *imx_hdr = (struct imx_header *) ptr;
811*4882a593Smuzhiyun 	uint32_t version = detect_imximage_version(imx_hdr);
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	switch (version) {
814*4882a593Smuzhiyun 	case IMXIMAGE_V1:
815*4882a593Smuzhiyun 		print_hdr_v1(imx_hdr);
816*4882a593Smuzhiyun 		break;
817*4882a593Smuzhiyun 	case IMXIMAGE_V2:
818*4882a593Smuzhiyun 		print_hdr_v2(imx_hdr);
819*4882a593Smuzhiyun 		break;
820*4882a593Smuzhiyun 	default:
821*4882a593Smuzhiyun 		err_imximage_version(version);
822*4882a593Smuzhiyun 		break;
823*4882a593Smuzhiyun 	}
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun 
imximage_set_header(void * ptr,struct stat * sbuf,int ifd,struct image_tool_params * params)826*4882a593Smuzhiyun static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
827*4882a593Smuzhiyun 				struct image_tool_params *params)
828*4882a593Smuzhiyun {
829*4882a593Smuzhiyun 	struct imx_header *imxhdr = (struct imx_header *)ptr;
830*4882a593Smuzhiyun 	uint32_t dcd_len;
831*4882a593Smuzhiyun 	uint32_t header_size;
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	/*
834*4882a593Smuzhiyun 	 * In order to not change the old imx cfg file
835*4882a593Smuzhiyun 	 * by adding VERSION command into it, here need
836*4882a593Smuzhiyun 	 * set up function ptr group to V1 by default.
837*4882a593Smuzhiyun 	 */
838*4882a593Smuzhiyun 	imximage_version = IMXIMAGE_V1;
839*4882a593Smuzhiyun 	/* Be able to detect if the cfg file has no BOOT_FROM tag */
840*4882a593Smuzhiyun 	imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
841*4882a593Smuzhiyun 	imximage_csf_size = 0;
842*4882a593Smuzhiyun 	set_hdr_func();
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 	/* Parse dcd configuration file */
845*4882a593Smuzhiyun 	dcd_len = parse_cfg_file(imxhdr, params->imagename);
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	if (imximage_version == IMXIMAGE_V1)
848*4882a593Smuzhiyun 		header_size = sizeof(flash_header_v1_t);
849*4882a593Smuzhiyun 	else {
850*4882a593Smuzhiyun 		header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
851*4882a593Smuzhiyun 		if (!plugin_image)
852*4882a593Smuzhiyun 			header_size += sizeof(dcd_v2_t);
853*4882a593Smuzhiyun 		else
854*4882a593Smuzhiyun 			header_size += MAX_PLUGIN_CODE_SIZE;
855*4882a593Smuzhiyun 	}
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	if (imximage_init_loadsize < imximage_ivt_offset + header_size)
858*4882a593Smuzhiyun 			imximage_init_loadsize = imximage_ivt_offset + header_size;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 	/* Set the imx header */
861*4882a593Smuzhiyun 	(*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
862*4882a593Smuzhiyun 
863*4882a593Smuzhiyun 	/*
864*4882a593Smuzhiyun 	 * ROM bug alert
865*4882a593Smuzhiyun 	 *
866*4882a593Smuzhiyun 	 * MX53 only loads 512 byte multiples in case of SD boot.
867*4882a593Smuzhiyun 	 * MX53 only loads NAND page multiples in case of NAND boot and
868*4882a593Smuzhiyun 	 * supports up to 4096 byte large pages, thus align to 4096.
869*4882a593Smuzhiyun 	 *
870*4882a593Smuzhiyun 	 * The remaining fraction of a block bytes would not be loaded!
871*4882a593Smuzhiyun 	 */
872*4882a593Smuzhiyun 	*header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun 	if (csf_ptr && imximage_csf_size) {
875*4882a593Smuzhiyun 		*csf_ptr = params->ep - imximage_init_loadsize +
876*4882a593Smuzhiyun 			*header_size_ptr;
877*4882a593Smuzhiyun 		*header_size_ptr += imximage_csf_size;
878*4882a593Smuzhiyun 	}
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun 
imximage_check_params(struct image_tool_params * params)881*4882a593Smuzhiyun int imximage_check_params(struct image_tool_params *params)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun 	if (!params)
884*4882a593Smuzhiyun 		return CFG_INVALID;
885*4882a593Smuzhiyun 	if (!strlen(params->imagename)) {
886*4882a593Smuzhiyun 		fprintf(stderr, "Error: %s - Configuration file not specified, "
887*4882a593Smuzhiyun 			"it is needed for imximage generation\n",
888*4882a593Smuzhiyun 			params->cmdname);
889*4882a593Smuzhiyun 		return CFG_INVALID;
890*4882a593Smuzhiyun 	}
891*4882a593Smuzhiyun 	/*
892*4882a593Smuzhiyun 	 * Check parameters:
893*4882a593Smuzhiyun 	 * XIP is not allowed and verify that incompatible
894*4882a593Smuzhiyun 	 * parameters are not sent at the same time
895*4882a593Smuzhiyun 	 * For example, if list is required a data image must not be provided
896*4882a593Smuzhiyun 	 */
897*4882a593Smuzhiyun 	return	(params->dflag && (params->fflag || params->lflag)) ||
898*4882a593Smuzhiyun 		(params->fflag && (params->dflag || params->lflag)) ||
899*4882a593Smuzhiyun 		(params->lflag && (params->dflag || params->fflag)) ||
900*4882a593Smuzhiyun 		(params->xflag) || !(strlen(params->imagename));
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun 
imximage_generate(struct image_tool_params * params,struct image_type_params * tparams)903*4882a593Smuzhiyun static int imximage_generate(struct image_tool_params *params,
904*4882a593Smuzhiyun 	struct image_type_params *tparams)
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun 	struct imx_header *imxhdr;
907*4882a593Smuzhiyun 	size_t alloc_len;
908*4882a593Smuzhiyun 	struct stat sbuf;
909*4882a593Smuzhiyun 	char *datafile = params->datafile;
910*4882a593Smuzhiyun 	uint32_t pad_len, header_size;
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	memset(&imximage_header, 0, sizeof(imximage_header));
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	/*
915*4882a593Smuzhiyun 	 * In order to not change the old imx cfg file
916*4882a593Smuzhiyun 	 * by adding VERSION command into it, here need
917*4882a593Smuzhiyun 	 * set up function ptr group to V1 by default.
918*4882a593Smuzhiyun 	 */
919*4882a593Smuzhiyun 	imximage_version = IMXIMAGE_V1;
920*4882a593Smuzhiyun 	/* Be able to detect if the cfg file has no BOOT_FROM tag */
921*4882a593Smuzhiyun 	imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
922*4882a593Smuzhiyun 	imximage_csf_size = 0;
923*4882a593Smuzhiyun 	set_hdr_func();
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun 	/* Parse dcd configuration file */
926*4882a593Smuzhiyun 	parse_cfg_file(&imximage_header, params->imagename);
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	if (imximage_version == IMXIMAGE_V1)
929*4882a593Smuzhiyun 		header_size = sizeof(imx_header_v1_t);
930*4882a593Smuzhiyun 	else {
931*4882a593Smuzhiyun 		header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
932*4882a593Smuzhiyun 		if (!plugin_image)
933*4882a593Smuzhiyun 			header_size += sizeof(dcd_v2_t);
934*4882a593Smuzhiyun 		else
935*4882a593Smuzhiyun 			header_size += MAX_PLUGIN_CODE_SIZE;
936*4882a593Smuzhiyun 	}
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	if (imximage_init_loadsize < imximage_ivt_offset + header_size)
939*4882a593Smuzhiyun 			imximage_init_loadsize = imximage_ivt_offset + header_size;
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun 	alloc_len = imximage_init_loadsize - imximage_ivt_offset;
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun 	if (alloc_len < header_size) {
944*4882a593Smuzhiyun 		fprintf(stderr, "%s: header error\n",
945*4882a593Smuzhiyun 			params->cmdname);
946*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
947*4882a593Smuzhiyun 	}
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun 	imxhdr = malloc(alloc_len);
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun 	if (!imxhdr) {
952*4882a593Smuzhiyun 		fprintf(stderr, "%s: malloc return failure: %s\n",
953*4882a593Smuzhiyun 			params->cmdname, strerror(errno));
954*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
955*4882a593Smuzhiyun 	}
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	memset(imxhdr, 0, alloc_len);
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun 	tparams->header_size = alloc_len;
960*4882a593Smuzhiyun 	tparams->hdr         = imxhdr;
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	/* determine data image file length */
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun 	if (stat(datafile, &sbuf) < 0) {
965*4882a593Smuzhiyun 		fprintf(stderr, "%s: Can't stat %s: %s\n",
966*4882a593Smuzhiyun 			params->cmdname, datafile, strerror(errno));
967*4882a593Smuzhiyun 		exit(EXIT_FAILURE);
968*4882a593Smuzhiyun 	}
969*4882a593Smuzhiyun 
970*4882a593Smuzhiyun 	pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	return pad_len;
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun /*
977*4882a593Smuzhiyun  * imximage parameters
978*4882a593Smuzhiyun  */
979*4882a593Smuzhiyun U_BOOT_IMAGE_TYPE(
980*4882a593Smuzhiyun 	imximage,
981*4882a593Smuzhiyun 	"Freescale i.MX Boot Image support",
982*4882a593Smuzhiyun 	0,
983*4882a593Smuzhiyun 	NULL,
984*4882a593Smuzhiyun 	imximage_check_params,
985*4882a593Smuzhiyun 	imximage_verify_header,
986*4882a593Smuzhiyun 	imximage_print_header,
987*4882a593Smuzhiyun 	imximage_set_header,
988*4882a593Smuzhiyun 	NULL,
989*4882a593Smuzhiyun 	imximage_check_image_types,
990*4882a593Smuzhiyun 	NULL,
991*4882a593Smuzhiyun 	imximage_generate
992*4882a593Smuzhiyun );
993