1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2002
3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * CPU test
12*4882a593Smuzhiyun * Integer compare instructions: cmpwi, cmplwi
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * To verify these instructions the test runs them with
15*4882a593Smuzhiyun * different combinations of operands, reads the condition
16*4882a593Smuzhiyun * register value and compares it with the expected one.
17*4882a593Smuzhiyun * The test contains a pre-built table
18*4882a593Smuzhiyun * containing the description of each test case: the instruction,
19*4882a593Smuzhiyun * the values of the operands, the condition field to save
20*4882a593Smuzhiyun * the result in and the expected result.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <post.h>
24*4882a593Smuzhiyun #include "cpu_asm.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #if CONFIG_POST & CONFIG_SYS_POST_CPU
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun static struct cpu_post_cmpi_s
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun ulong cmd;
33*4882a593Smuzhiyun ulong op1;
34*4882a593Smuzhiyun ushort op2;
35*4882a593Smuzhiyun ulong cr;
36*4882a593Smuzhiyun ulong res;
37*4882a593Smuzhiyun } cpu_post_cmpi_table[] =
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun OP_CMPWI,
41*4882a593Smuzhiyun 123,
42*4882a593Smuzhiyun 123,
43*4882a593Smuzhiyun 2,
44*4882a593Smuzhiyun 0x02
45*4882a593Smuzhiyun },
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun OP_CMPWI,
48*4882a593Smuzhiyun 123,
49*4882a593Smuzhiyun 133,
50*4882a593Smuzhiyun 3,
51*4882a593Smuzhiyun 0x08
52*4882a593Smuzhiyun },
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun OP_CMPWI,
55*4882a593Smuzhiyun 123,
56*4882a593Smuzhiyun -133,
57*4882a593Smuzhiyun 4,
58*4882a593Smuzhiyun 0x04
59*4882a593Smuzhiyun },
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun OP_CMPLWI,
62*4882a593Smuzhiyun 123,
63*4882a593Smuzhiyun 123,
64*4882a593Smuzhiyun 2,
65*4882a593Smuzhiyun 0x02
66*4882a593Smuzhiyun },
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun OP_CMPLWI,
69*4882a593Smuzhiyun 123,
70*4882a593Smuzhiyun -133,
71*4882a593Smuzhiyun 3,
72*4882a593Smuzhiyun 0x08
73*4882a593Smuzhiyun },
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun OP_CMPLWI,
76*4882a593Smuzhiyun 123,
77*4882a593Smuzhiyun 113,
78*4882a593Smuzhiyun 4,
79*4882a593Smuzhiyun 0x04
80*4882a593Smuzhiyun },
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun static unsigned int cpu_post_cmpi_size = ARRAY_SIZE(cpu_post_cmpi_table);
83*4882a593Smuzhiyun
cpu_post_test_cmpi(void)84*4882a593Smuzhiyun int cpu_post_test_cmpi (void)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun int ret = 0;
87*4882a593Smuzhiyun unsigned int i;
88*4882a593Smuzhiyun int flag = disable_interrupts();
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i;
93*4882a593Smuzhiyun unsigned long code[] =
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun ASM_1IC(test->cmd, test->cr, 3, test->op2),
96*4882a593Smuzhiyun ASM_MFCR(3),
97*4882a593Smuzhiyun ASM_BLR
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun ulong res;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun cpu_post_exec_11 (code, & res, test->op1);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun if (ret != 0)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun post_log ("Error at cmpi test %d !\n", i);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun if (flag)
112*4882a593Smuzhiyun enable_interrupts();
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun #endif
118