1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2002 Wolfgang Denk <wd@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <config.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include <post.h> 10*4882a593Smuzhiyun#include <ppc_asm.tmpl> 11*4882a593Smuzhiyun#include <ppc_defs.h> 12*4882a593Smuzhiyun#include <asm/cache.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun#if CONFIG_POST & CONFIG_SYS_POST_CPU 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */ 17*4882a593Smuzhiyun .global cpu_post_exec_02 18*4882a593Smuzhiyuncpu_post_exec_02: 19*4882a593Smuzhiyun isync 20*4882a593Smuzhiyun mflr r0 21*4882a593Smuzhiyun stwu r0, -4(r1) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun subi r1, r1, 104 24*4882a593Smuzhiyun stmw r6, 0(r1) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun mtlr r3 27*4882a593Smuzhiyun mr r3, r4 28*4882a593Smuzhiyun mr r4, r5 29*4882a593Smuzhiyun blrl 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun lmw r6, 0(r1) 32*4882a593Smuzhiyun addi r1, r1, 104 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun lwz r0, 0(r1) 35*4882a593Smuzhiyun addi r1, r1, 4 36*4882a593Smuzhiyun mtlr r0 37*4882a593Smuzhiyun blr 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun/* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */ 40*4882a593Smuzhiyun .global cpu_post_exec_04 41*4882a593Smuzhiyuncpu_post_exec_04: 42*4882a593Smuzhiyun isync 43*4882a593Smuzhiyun mflr r0 44*4882a593Smuzhiyun stwu r0, -4(r1) 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun subi r1, r1, 96 47*4882a593Smuzhiyun stmw r8, 0(r1) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun mtlr r3 50*4882a593Smuzhiyun mr r3, r4 51*4882a593Smuzhiyun mr r4, r5 52*4882a593Smuzhiyun mr r5, r6 53*4882a593Smuzhiyun mtxer r7 54*4882a593Smuzhiyun blrl 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun lmw r8, 0(r1) 57*4882a593Smuzhiyun addi r1, r1, 96 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun lwz r0, 0(r1) 60*4882a593Smuzhiyun addi r1, r1, 4 61*4882a593Smuzhiyun mtlr r0 62*4882a593Smuzhiyun blr 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun/* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */ 65*4882a593Smuzhiyun .global cpu_post_exec_12 66*4882a593Smuzhiyuncpu_post_exec_12: 67*4882a593Smuzhiyun isync 68*4882a593Smuzhiyun mflr r0 69*4882a593Smuzhiyun stwu r0, -4(r1) 70*4882a593Smuzhiyun stwu r4, -4(r1) 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun mtlr r3 73*4882a593Smuzhiyun mr r3, r5 74*4882a593Smuzhiyun mr r4, r6 75*4882a593Smuzhiyun blrl 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun lwz r4, 0(r1) 78*4882a593Smuzhiyun stw r3, 0(r4) 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun lwz r0, 4(r1) 81*4882a593Smuzhiyun addi r1, r1, 8 82*4882a593Smuzhiyun mtlr r0 83*4882a593Smuzhiyun blr 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun/* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */ 86*4882a593Smuzhiyun .global cpu_post_exec_11 87*4882a593Smuzhiyuncpu_post_exec_11: 88*4882a593Smuzhiyun isync 89*4882a593Smuzhiyun mflr r0 90*4882a593Smuzhiyun stwu r0, -4(r1) 91*4882a593Smuzhiyun stwu r4, -4(r1) 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun mtlr r3 94*4882a593Smuzhiyun mr r3, r5 95*4882a593Smuzhiyun blrl 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun lwz r4, 0(r1) 98*4882a593Smuzhiyun stw r3, 0(r4) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun lwz r0, 4(r1) 101*4882a593Smuzhiyun addi r1, r1, 8 102*4882a593Smuzhiyun mtlr r0 103*4882a593Smuzhiyun blr 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun/* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */ 106*4882a593Smuzhiyun .global cpu_post_exec_21 107*4882a593Smuzhiyuncpu_post_exec_21: 108*4882a593Smuzhiyun isync 109*4882a593Smuzhiyun mflr r0 110*4882a593Smuzhiyun stwu r0, -4(r1) 111*4882a593Smuzhiyun stwu r4, -4(r1) 112*4882a593Smuzhiyun stwu r5, -4(r1) 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun li r0, 0 115*4882a593Smuzhiyun mtxer r0 116*4882a593Smuzhiyun lwz r0, 0(r4) 117*4882a593Smuzhiyun mtcr r0 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun mtlr r3 120*4882a593Smuzhiyun mr r3, r6 121*4882a593Smuzhiyun blrl 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun mfcr r0 124*4882a593Smuzhiyun lwz r4, 4(r1) 125*4882a593Smuzhiyun stw r0, 0(r4) 126*4882a593Smuzhiyun lwz r4, 0(r1) 127*4882a593Smuzhiyun stw r3, 0(r4) 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun lwz r0, 8(r1) 130*4882a593Smuzhiyun addi r1, r1, 12 131*4882a593Smuzhiyun mtlr r0 132*4882a593Smuzhiyun blr 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun/* void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1, 135*4882a593Smuzhiyun ulong op2); */ 136*4882a593Smuzhiyun .global cpu_post_exec_22 137*4882a593Smuzhiyuncpu_post_exec_22: 138*4882a593Smuzhiyun isync 139*4882a593Smuzhiyun mflr r0 140*4882a593Smuzhiyun stwu r0, -4(r1) 141*4882a593Smuzhiyun stwu r4, -4(r1) 142*4882a593Smuzhiyun stwu r5, -4(r1) 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun li r0, 0 145*4882a593Smuzhiyun mtxer r0 146*4882a593Smuzhiyun lwz r0, 0(r4) 147*4882a593Smuzhiyun mtcr r0 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun mtlr r3 150*4882a593Smuzhiyun mr r3, r6 151*4882a593Smuzhiyun mr r4, r7 152*4882a593Smuzhiyun blrl 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun mfcr r0 155*4882a593Smuzhiyun lwz r4, 4(r1) 156*4882a593Smuzhiyun stw r0, 0(r4) 157*4882a593Smuzhiyun lwz r4, 0(r1) 158*4882a593Smuzhiyun stw r3, 0(r4) 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun lwz r0, 8(r1) 161*4882a593Smuzhiyun addi r1, r1, 12 162*4882a593Smuzhiyun mtlr r0 163*4882a593Smuzhiyun blr 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun/* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */ 166*4882a593Smuzhiyun .global cpu_post_exec_12w 167*4882a593Smuzhiyuncpu_post_exec_12w: 168*4882a593Smuzhiyun isync 169*4882a593Smuzhiyun mflr r0 170*4882a593Smuzhiyun stwu r0, -4(r1) 171*4882a593Smuzhiyun stwu r4, -4(r1) 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun mtlr r3 174*4882a593Smuzhiyun lwz r3, 0(r4) 175*4882a593Smuzhiyun mr r4, r5 176*4882a593Smuzhiyun mr r5, r6 177*4882a593Smuzhiyun blrl 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun lwz r4, 0(r1) 180*4882a593Smuzhiyun stw r3, 0(r4) 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun lwz r0, 4(r1) 183*4882a593Smuzhiyun addi r1, r1, 8 184*4882a593Smuzhiyun mtlr r0 185*4882a593Smuzhiyun blr 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun/* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */ 188*4882a593Smuzhiyun .global cpu_post_exec_11w 189*4882a593Smuzhiyuncpu_post_exec_11w: 190*4882a593Smuzhiyun isync 191*4882a593Smuzhiyun mflr r0 192*4882a593Smuzhiyun stwu r0, -4(r1) 193*4882a593Smuzhiyun stwu r4, -4(r1) 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun mtlr r3 196*4882a593Smuzhiyun lwz r3, 0(r4) 197*4882a593Smuzhiyun mr r4, r5 198*4882a593Smuzhiyun blrl 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun lwz r4, 0(r1) 201*4882a593Smuzhiyun stw r3, 0(r4) 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun lwz r0, 4(r1) 204*4882a593Smuzhiyun addi r1, r1, 8 205*4882a593Smuzhiyun mtlr r0 206*4882a593Smuzhiyun blr 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun/* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */ 209*4882a593Smuzhiyun .global cpu_post_exec_22w 210*4882a593Smuzhiyuncpu_post_exec_22w: 211*4882a593Smuzhiyun isync 212*4882a593Smuzhiyun mflr r0 213*4882a593Smuzhiyun stwu r0, -4(r1) 214*4882a593Smuzhiyun stwu r4, -4(r1) 215*4882a593Smuzhiyun stwu r6, -4(r1) 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun mtlr r3 218*4882a593Smuzhiyun lwz r3, 0(r4) 219*4882a593Smuzhiyun mr r4, r5 220*4882a593Smuzhiyun blrl 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun lwz r4, 4(r1) 223*4882a593Smuzhiyun stw r3, 0(r4) 224*4882a593Smuzhiyun lwz r4, 0(r1) 225*4882a593Smuzhiyun stw r5, 0(r4) 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun lwz r0, 8(r1) 228*4882a593Smuzhiyun addi r1, r1, 12 229*4882a593Smuzhiyun mtlr r0 230*4882a593Smuzhiyun blr 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun/* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */ 233*4882a593Smuzhiyun .global cpu_post_exec_21w 234*4882a593Smuzhiyuncpu_post_exec_21w: 235*4882a593Smuzhiyun isync 236*4882a593Smuzhiyun mflr r0 237*4882a593Smuzhiyun stwu r0, -4(r1) 238*4882a593Smuzhiyun stwu r4, -4(r1) 239*4882a593Smuzhiyun stwu r5, -4(r1) 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun mtlr r3 242*4882a593Smuzhiyun lwz r3, 0(r4) 243*4882a593Smuzhiyun blrl 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun lwz r5, 4(r1) 246*4882a593Smuzhiyun stw r3, 0(r5) 247*4882a593Smuzhiyun lwz r5, 0(r1) 248*4882a593Smuzhiyun stw r4, 0(r5) 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun lwz r0, 8(r1) 251*4882a593Smuzhiyun addi r1, r1, 12 252*4882a593Smuzhiyun mtlr r0 253*4882a593Smuzhiyun blr 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun/* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */ 256*4882a593Smuzhiyun .global cpu_post_exec_21x 257*4882a593Smuzhiyuncpu_post_exec_21x: 258*4882a593Smuzhiyun isync 259*4882a593Smuzhiyun mflr r0 260*4882a593Smuzhiyun stwu r0, -4(r1) 261*4882a593Smuzhiyun stwu r4, -4(r1) 262*4882a593Smuzhiyun stwu r5, -4(r1) 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun mtlr r3 265*4882a593Smuzhiyun mr r3, r6 266*4882a593Smuzhiyun blrl 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun lwz r5, 4(r1) 269*4882a593Smuzhiyun stw r3, 0(r5) 270*4882a593Smuzhiyun lwz r5, 0(r1) 271*4882a593Smuzhiyun stw r4, 0(r5) 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun lwz r0, 8(r1) 274*4882a593Smuzhiyun addi r1, r1, 12 275*4882a593Smuzhiyun mtlr r0 276*4882a593Smuzhiyun blr 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun/* void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump, 279*4882a593Smuzhiyun ulong cr); */ 280*4882a593Smuzhiyun .global cpu_post_exec_31 281*4882a593Smuzhiyuncpu_post_exec_31: 282*4882a593Smuzhiyun isync 283*4882a593Smuzhiyun mflr r0 284*4882a593Smuzhiyun stwu r0, -4(r1) 285*4882a593Smuzhiyun stwu r4, -4(r1) 286*4882a593Smuzhiyun stwu r5, -4(r1) 287*4882a593Smuzhiyun stwu r6, -4(r1) 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun mtlr r3 290*4882a593Smuzhiyun lwz r3, 0(r4) 291*4882a593Smuzhiyun lwz r4, 0(r5) 292*4882a593Smuzhiyun mr r6, r7 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun mfcr r7 295*4882a593Smuzhiyun blrl 296*4882a593Smuzhiyun mtcr r7 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun lwz r7, 8(r1) 299*4882a593Smuzhiyun stw r3, 0(r7) 300*4882a593Smuzhiyun lwz r7, 4(r1) 301*4882a593Smuzhiyun stw r4, 0(r7) 302*4882a593Smuzhiyun lwz r7, 0(r1) 303*4882a593Smuzhiyun stw r5, 0(r7) 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun lwz r0, 12(r1) 306*4882a593Smuzhiyun addi r1, r1, 16 307*4882a593Smuzhiyun mtlr r0 308*4882a593Smuzhiyun blr 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun/* int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n); */ 311*4882a593Smuzhiyun .global cpu_post_complex_1_asm 312*4882a593Smuzhiyuncpu_post_complex_1_asm: 313*4882a593Smuzhiyun li r9,0 314*4882a593Smuzhiyun cmpw r9,r7 315*4882a593Smuzhiyun bge cpu_post_complex_1_done 316*4882a593Smuzhiyun mtctr r7 317*4882a593Smuzhiyuncpu_post_complex_1_loop: 318*4882a593Smuzhiyun mullw r0,r3,r4 319*4882a593Smuzhiyun subf r0,r5,r0 320*4882a593Smuzhiyun divw r0,r0,r6 321*4882a593Smuzhiyun add r9,r9,r0 322*4882a593Smuzhiyun bdnz cpu_post_complex_1_loop 323*4882a593Smuzhiyuncpu_post_complex_1_done: 324*4882a593Smuzhiyun mr r3,r9 325*4882a593Smuzhiyun blr 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun/* int cpu_post_complex_2_asm (int x, int n); */ 328*4882a593Smuzhiyun .global cpu_post_complex_2_asm 329*4882a593Smuzhiyuncpu_post_complex_2_asm: 330*4882a593Smuzhiyun mr. r0,r4 331*4882a593Smuzhiyun mtctr r0 332*4882a593Smuzhiyun mr r0,r3 333*4882a593Smuzhiyun li r3,1 334*4882a593Smuzhiyun li r4,1 335*4882a593Smuzhiyun blelr 336*4882a593Smuzhiyuncpu_post_complex_2_loop: 337*4882a593Smuzhiyun mullw r3,r3,r0 338*4882a593Smuzhiyun add r3,r3,r4 339*4882a593Smuzhiyun bdnz cpu_post_complex_2_loop 340*4882a593Smuzhiyunblr 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun#endif 343