1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * Copyright (c) 2004, 2008 IBM Corporation 3*4882a593Smuzhiyun * Copyright (c) 2009 Pattrick Hueper <phueper@hueper.net> 4*4882a593Smuzhiyun * All rights reserved. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: BSD-2-Clause 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Contributors: 9*4882a593Smuzhiyun * IBM Corporation - initial implementation 10*4882a593Smuzhiyun *****************************************************************************/ 11*4882a593Smuzhiyun #ifndef _VBE_H 12*4882a593Smuzhiyun #define _VBE_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* these structs are for input from and output to OF */ 15*4882a593Smuzhiyun struct __packed vbe_screen_info { 16*4882a593Smuzhiyun u8 display_type; /* 0=NONE, 1= analog, 2=digital */ 17*4882a593Smuzhiyun u16 screen_width; 18*4882a593Smuzhiyun u16 screen_height; 19*4882a593Smuzhiyun /* bytes per line in framebuffer, may be more than screen_width */ 20*4882a593Smuzhiyun u16 screen_linebytes; 21*4882a593Smuzhiyun u8 color_depth; /* color depth in bits per pixel */ 22*4882a593Smuzhiyun u32 framebuffer_address; 23*4882a593Smuzhiyun u8 edid_block_zero[128]; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun struct __packed vbe_screen_info_input { 27*4882a593Smuzhiyun u8 signature[4]; 28*4882a593Smuzhiyun u16 size_reserved; 29*4882a593Smuzhiyun u8 monitor_number; 30*4882a593Smuzhiyun u16 max_screen_width; 31*4882a593Smuzhiyun u8 color_depth; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* these structs only store the required a subset of the VBE-defined fields */ 35*4882a593Smuzhiyun struct __packed vbe_info { 36*4882a593Smuzhiyun char signature[4]; 37*4882a593Smuzhiyun u16 version; 38*4882a593Smuzhiyun u32 oem_string_ptr; 39*4882a593Smuzhiyun u32 capabilities; 40*4882a593Smuzhiyun u32 modes_ptr; 41*4882a593Smuzhiyun u16 total_memory; 42*4882a593Smuzhiyun u16 oem_version; 43*4882a593Smuzhiyun u32 vendor_name_ptr; 44*4882a593Smuzhiyun u32 product_name_ptr; 45*4882a593Smuzhiyun u32 product_rev_ptr; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun struct __packed vesa_mode_info { 49*4882a593Smuzhiyun u16 mode_attributes; /* 00 */ 50*4882a593Smuzhiyun u8 win_a_attributes; /* 02 */ 51*4882a593Smuzhiyun u8 win_b_attributes; /* 03 */ 52*4882a593Smuzhiyun u16 win_granularity; /* 04 */ 53*4882a593Smuzhiyun u16 win_size; /* 06 */ 54*4882a593Smuzhiyun u16 win_a_segment; /* 08 */ 55*4882a593Smuzhiyun u16 win_b_segment; /* 0a */ 56*4882a593Smuzhiyun u32 win_func_ptr; /* 0c */ 57*4882a593Smuzhiyun u16 bytes_per_scanline; /* 10 */ 58*4882a593Smuzhiyun u16 x_resolution; /* 12 */ 59*4882a593Smuzhiyun u16 y_resolution; /* 14 */ 60*4882a593Smuzhiyun u8 x_charsize; /* 16 */ 61*4882a593Smuzhiyun u8 y_charsize; /* 17 */ 62*4882a593Smuzhiyun u8 number_of_planes; /* 18 */ 63*4882a593Smuzhiyun u8 bits_per_pixel; /* 19 */ 64*4882a593Smuzhiyun u8 number_of_banks; /* 20 */ 65*4882a593Smuzhiyun u8 memory_model; /* 21 */ 66*4882a593Smuzhiyun u8 bank_size; /* 22 */ 67*4882a593Smuzhiyun u8 number_of_image_pages; /* 23 */ 68*4882a593Smuzhiyun u8 reserved_page; 69*4882a593Smuzhiyun u8 red_mask_size; 70*4882a593Smuzhiyun u8 red_mask_pos; 71*4882a593Smuzhiyun u8 green_mask_size; 72*4882a593Smuzhiyun u8 green_mask_pos; 73*4882a593Smuzhiyun u8 blue_mask_size; 74*4882a593Smuzhiyun u8 blue_mask_pos; 75*4882a593Smuzhiyun u8 reserved_mask_size; 76*4882a593Smuzhiyun u8 reserved_mask_pos; 77*4882a593Smuzhiyun u8 direct_color_mode_info; 78*4882a593Smuzhiyun u32 phys_base_ptr; 79*4882a593Smuzhiyun u32 offscreen_mem_offset; 80*4882a593Smuzhiyun u16 offscreen_mem_size; 81*4882a593Smuzhiyun u8 reserved[206]; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun struct vbe_mode_info { 85*4882a593Smuzhiyun u16 video_mode; 86*4882a593Smuzhiyun bool valid; 87*4882a593Smuzhiyun union { 88*4882a593Smuzhiyun struct vesa_mode_info vesa; 89*4882a593Smuzhiyun u8 mode_info_block[256]; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun struct vbe_ddc_info { 94*4882a593Smuzhiyun u8 port_number; /* i.e. monitor number */ 95*4882a593Smuzhiyun u8 edid_transfer_time; 96*4882a593Smuzhiyun u8 ddc_level; 97*4882a593Smuzhiyun u8 edid_block_zero[128]; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define VESA_GET_INFO 0x4f00 101*4882a593Smuzhiyun #define VESA_GET_MODE_INFO 0x4f01 102*4882a593Smuzhiyun #define VESA_SET_MODE 0x4f02 103*4882a593Smuzhiyun #define VESA_GET_CUR_MODE 0x4f03 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun extern struct vbe_mode_info mode_info; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun struct video_priv; 108*4882a593Smuzhiyun struct video_uc_platdata; 109*4882a593Smuzhiyun int vbe_setup_video_priv(struct vesa_mode_info *vesa, 110*4882a593Smuzhiyun struct video_priv *uc_priv, 111*4882a593Smuzhiyun struct video_uc_platdata *plat); 112*4882a593Smuzhiyun int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void)); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #endif 115