1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2023 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef _SPL_DISPLAY_H_ 8 #define _SPL_DISPLAY_H_ 9 10 #include <common.h> 11 #include <drm_modes.h> 12 #include <mp_boot.h> 13 14 /* SPL display */ 15 #define RK3528_VOP_BASE 0xff840000 16 #define RK3528_HDMI_BASE 0xff8d0000 17 #define RK3528_HDMIPHY_BASE 0xffe00000 18 #define RK3528_CRU_BASE 0xff4a0000 19 #define RK3528_GPIO0_IOC_BASE 0xff540000 20 #define RK3528_GPIO_BASE 0xff610000 21 22 struct spl_display_info { 23 struct drm_display_mode mode; 24 u32 bus_format; 25 u32 enabled; 26 }; 27 #endif 28 29