xref: /OK3568_Linux_fs/u-boot/include/power/pmic.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *  Copyright (C) 2014-2015 Samsung Electronics
3*4882a593Smuzhiyun  *  Przemyslaw Marczak <p.marczak@samsung.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2011-2012 Samsung Electronics
6*4882a593Smuzhiyun  *  Lukasz Majewski <l.majewski@samsung.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __CORE_PMIC_H_
12*4882a593Smuzhiyun #define __CORE_PMIC_H_
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <dm/ofnode.h>
15*4882a593Smuzhiyun #include <i2c.h>
16*4882a593Smuzhiyun #include <linux/list.h>
17*4882a593Smuzhiyun #include <power/power_chrg.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #ifdef CONFIG_POWER
22*4882a593Smuzhiyun enum { I2C_PMIC, I2C_NUM, };
23*4882a593Smuzhiyun enum { PMIC_READ, PMIC_WRITE, };
24*4882a593Smuzhiyun enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun enum {
27*4882a593Smuzhiyun 	PMIC_CHARGER_DISABLE,
28*4882a593Smuzhiyun 	PMIC_CHARGER_ENABLE,
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct p_i2c {
32*4882a593Smuzhiyun 	unsigned char addr;
33*4882a593Smuzhiyun 	unsigned char *buf;
34*4882a593Smuzhiyun 	unsigned char tx_num;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun struct p_spi {
38*4882a593Smuzhiyun 	unsigned int cs;
39*4882a593Smuzhiyun 	unsigned int mode;
40*4882a593Smuzhiyun 	unsigned int bitlen;
41*4882a593Smuzhiyun 	unsigned int clk;
42*4882a593Smuzhiyun 	unsigned int flags;
43*4882a593Smuzhiyun 	u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun struct pmic;
47*4882a593Smuzhiyun struct power_fg {
48*4882a593Smuzhiyun 	int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
49*4882a593Smuzhiyun 	int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun struct power_chrg {
53*4882a593Smuzhiyun 	int (*chrg_type) (struct pmic *p);
54*4882a593Smuzhiyun 	int (*chrg_bat_present) (struct pmic *p);
55*4882a593Smuzhiyun 	int (*chrg_state) (struct pmic *p, int state, int current);
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun struct power_battery {
59*4882a593Smuzhiyun 	struct battery *bat;
60*4882a593Smuzhiyun 	int (*battery_init) (struct pmic *bat, struct pmic *p1,
61*4882a593Smuzhiyun 			     struct pmic *p2, struct pmic *p3);
62*4882a593Smuzhiyun 	int (*battery_charge) (struct pmic *bat);
63*4882a593Smuzhiyun 	/* Keep info about power devices involved with battery operation */
64*4882a593Smuzhiyun 	struct pmic *chrg, *fg, *muic;
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun struct pmic {
68*4882a593Smuzhiyun 	const char *name;
69*4882a593Smuzhiyun 	unsigned char bus;
70*4882a593Smuzhiyun 	unsigned char interface;
71*4882a593Smuzhiyun 	unsigned char sensor_byte_order;
72*4882a593Smuzhiyun 	unsigned int number_of_regs;
73*4882a593Smuzhiyun 	union hw {
74*4882a593Smuzhiyun 		struct p_i2c i2c;
75*4882a593Smuzhiyun 		struct p_spi spi;
76*4882a593Smuzhiyun 	} hw;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	void (*low_power_mode) (void);
79*4882a593Smuzhiyun 	struct power_battery *pbat;
80*4882a593Smuzhiyun 	struct power_chrg *chrg;
81*4882a593Smuzhiyun 	struct power_fg *fg;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	struct pmic *parent;
84*4882a593Smuzhiyun 	struct list_head list;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun #endif /* CONFIG_POWER */
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #ifdef CONFIG_DM_PMIC
89*4882a593Smuzhiyun /**
90*4882a593Smuzhiyun  * U-Boot PMIC Framework
91*4882a593Smuzhiyun  * =====================
92*4882a593Smuzhiyun  *
93*4882a593Smuzhiyun  * UCLASS_PMIC - This is designed to provide an I/O interface for PMIC devices.
94*4882a593Smuzhiyun  *
95*4882a593Smuzhiyun  * For the multi-function PMIC devices, this can be used as parent I/O device
96*4882a593Smuzhiyun  * for each IC's interface. Then, each child uses its parent for read/write.
97*4882a593Smuzhiyun  *
98*4882a593Smuzhiyun  * The driver model tree could look like this:
99*4882a593Smuzhiyun  *
100*4882a593Smuzhiyun  *_ root device
101*4882a593Smuzhiyun  * |_ BUS 0 device (e.g. I2C0)                 - UCLASS_I2C/SPI/...
102*4882a593Smuzhiyun  * | |_ PMIC device (READ/WRITE ops)           - UCLASS_PMIC
103*4882a593Smuzhiyun  * |   |_ REGULATOR device (ldo/buck/... ops)  - UCLASS_REGULATOR
104*4882a593Smuzhiyun  * |   |_ CHARGER device (charger ops)         - UCLASS_CHARGER (in the future)
105*4882a593Smuzhiyun  * |   |_ MUIC device (microUSB connector ops) - UCLASS_MUIC    (in the future)
106*4882a593Smuzhiyun  * |   |_ ...
107*4882a593Smuzhiyun  * |
108*4882a593Smuzhiyun  * |_ BUS 1 device (e.g. I2C1)                 - UCLASS_I2C/SPI/...
109*4882a593Smuzhiyun  *   |_ PMIC device (READ/WRITE ops)           - UCLASS_PMIC
110*4882a593Smuzhiyun  *     |_ RTC device (rtc ops)                 - UCLASS_RTC     (in the future)
111*4882a593Smuzhiyun  *
112*4882a593Smuzhiyun  * We can find two PMIC cases in boards design:
113*4882a593Smuzhiyun  * - single I/O interface
114*4882a593Smuzhiyun  * - multiple I/O interfaces
115*4882a593Smuzhiyun  * We bind a single PMIC device for each interface, to provide an I/O for
116*4882a593Smuzhiyun  * its child devices. And each child usually implements a different function,
117*4882a593Smuzhiyun  * controlled by the same interface.
118*4882a593Smuzhiyun  *
119*4882a593Smuzhiyun  * The binding should be done automatically. If device tree nodes/subnodes are
120*4882a593Smuzhiyun  * proper defined, then:
121*4882a593Smuzhiyun  *
122*4882a593Smuzhiyun  * |_ the ROOT driver will bind the device for I2C/SPI node:
123*4882a593Smuzhiyun  *   |_ the I2C/SPI driver should bind a device for pmic node:
124*4882a593Smuzhiyun  *     |_ the PMIC driver should bind devices for its childs:
125*4882a593Smuzhiyun  *       |_ regulator (child)
126*4882a593Smuzhiyun  *       |_ charger   (child)
127*4882a593Smuzhiyun  *       |_ other     (child)
128*4882a593Smuzhiyun  *
129*4882a593Smuzhiyun  * The same for other device nodes, for multi-interface PMIC.
130*4882a593Smuzhiyun  *
131*4882a593Smuzhiyun  * Note:
132*4882a593Smuzhiyun  * Each PMIC interface driver should use a different compatible string.
133*4882a593Smuzhiyun  *
134*4882a593Smuzhiyun  * If a PMIC child device driver needs access the PMIC-specific registers,
135*4882a593Smuzhiyun  * it need know only the register address and the access can be done through
136*4882a593Smuzhiyun  * the parent pmic driver. Like in the example:
137*4882a593Smuzhiyun  *
138*4882a593Smuzhiyun  *_ root driver
139*4882a593Smuzhiyun  * |_ dev: bus I2C0                                         - UCLASS_I2C
140*4882a593Smuzhiyun  * | |_ dev: my_pmic (read/write)              (is parent)  - UCLASS_PMIC
141*4882a593Smuzhiyun  * |   |_ dev: my_regulator (set value/etc..)  (is child)   - UCLASS_REGULATOR
142*4882a593Smuzhiyun  *
143*4882a593Smuzhiyun  * To ensure such device relationship, the pmic device driver should also bind
144*4882a593Smuzhiyun  * all its child devices, like in the example below. It can be done by calling
145*4882a593Smuzhiyun  * the 'pmic_bind_children()' - please refer to the function description, which
146*4882a593Smuzhiyun  * can be found in this header file. This function, should be called inside the
147*4882a593Smuzhiyun  * driver's bind() method.
148*4882a593Smuzhiyun  *
149*4882a593Smuzhiyun  * For the example driver, please refer the MAX77686 driver:
150*4882a593Smuzhiyun  * - 'drivers/power/pmic/max77686.c'
151*4882a593Smuzhiyun  */
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /**
154*4882a593Smuzhiyun  * struct dm_pmic_ops - PMIC device I/O interface
155*4882a593Smuzhiyun  *
156*4882a593Smuzhiyun  * Should be implemented by UCLASS_PMIC device drivers. The standard
157*4882a593Smuzhiyun  * device operations provides the I/O interface for it's childs.
158*4882a593Smuzhiyun  *
159*4882a593Smuzhiyun  * @reg_count: device's register count
160*4882a593Smuzhiyun  * @read:      read 'len' bytes at "reg" and store it into the 'buffer'
161*4882a593Smuzhiyun  * @write:     write 'len' bytes from the 'buffer' to the register at 'reg' address
162*4882a593Smuzhiyun  */
163*4882a593Smuzhiyun struct dm_pmic_ops {
164*4882a593Smuzhiyun 	int (*reg_count)(struct udevice *dev);
165*4882a593Smuzhiyun 	int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
166*4882a593Smuzhiyun 	int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
167*4882a593Smuzhiyun 		     int len);
168*4882a593Smuzhiyun 	int (*suspend)(struct udevice *dev);
169*4882a593Smuzhiyun 	int (*resume)(struct udevice *dev);
170*4882a593Smuzhiyun 	int (*shutdown)(struct udevice *dev);
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun /**
174*4882a593Smuzhiyun  * enum pmic_op_type - used for various pmic devices operation calls,
175*4882a593Smuzhiyun  * for reduce a number of lines with the same code for read/write or get/set.
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * @PMIC_OP_GET - get operation
178*4882a593Smuzhiyun  * @PMIC_OP_SET - set operation
179*4882a593Smuzhiyun */
180*4882a593Smuzhiyun enum pmic_op_type {
181*4882a593Smuzhiyun 	PMIC_OP_GET,
182*4882a593Smuzhiyun 	PMIC_OP_SET,
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun /**
186*4882a593Smuzhiyun  * struct pmic_child_info - basic device's child info for bind child nodes with
187*4882a593Smuzhiyun  * the driver by the node name prefix and driver name. This is a helper struct
188*4882a593Smuzhiyun  * for function: pmic_bind_children().
189*4882a593Smuzhiyun  *
190*4882a593Smuzhiyun  * @prefix - child node name prefix (or its name if is unique or single)
191*4882a593Smuzhiyun  * @driver - driver name for the sub-node with prefix
192*4882a593Smuzhiyun  */
193*4882a593Smuzhiyun struct pmic_child_info {
194*4882a593Smuzhiyun 	const char *addr;
195*4882a593Smuzhiyun 	const char *prefix;
196*4882a593Smuzhiyun 	const char *driver;
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /* drivers/power/pmic-uclass.c */
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun /**
202*4882a593Smuzhiyun  * pmic_bind_children() - bind drivers for given parent pmic, using child info
203*4882a593Smuzhiyun  * found in 'child_info' array.
204*4882a593Smuzhiyun  *
205*4882a593Smuzhiyun  * @pmic       - pmic device - the parent of found child's
206*4882a593Smuzhiyun  * @child_info - N-childs info array
207*4882a593Smuzhiyun  * @return a positive number of childs, or 0 if no child found (error)
208*4882a593Smuzhiyun  *
209*4882a593Smuzhiyun  * Note: For N-childs the child_info array should have N+1 entries and the last
210*4882a593Smuzhiyun  * entry prefix should be NULL - the same as for drivers compatible.
211*4882a593Smuzhiyun  *
212*4882a593Smuzhiyun  * For example, a single prefix info (N=1):
213*4882a593Smuzhiyun  * static const struct pmic_child_info bind_info[] = {
214*4882a593Smuzhiyun  *     { .prefix = "ldo", .driver = "ldo_driver" },
215*4882a593Smuzhiyun  *     { },
216*4882a593Smuzhiyun  * };
217*4882a593Smuzhiyun  *
218*4882a593Smuzhiyun  * This function is useful for regulator sub-nodes:
219*4882a593Smuzhiyun  * my_regulator@0xa {
220*4882a593Smuzhiyun  *     reg = <0xa>;
221*4882a593Smuzhiyun  *     (pmic - bind automatically by compatible)
222*4882a593Smuzhiyun  *     compatible = "my_pmic";
223*4882a593Smuzhiyun  *     ...
224*4882a593Smuzhiyun  *     (pmic's childs - bind by pmic_bind_children())
225*4882a593Smuzhiyun  *     (nodes prefix: "ldo", driver: "my_regulator_ldo")
226*4882a593Smuzhiyun  *     ldo1 { ... };
227*4882a593Smuzhiyun  *     ldo2 { ... };
228*4882a593Smuzhiyun  *
229*4882a593Smuzhiyun  *     (nodes prefix: "buck", driver: "my_regulator_buck")
230*4882a593Smuzhiyun  *     buck1 { ... };
231*4882a593Smuzhiyun  *     buck2 { ... };
232*4882a593Smuzhiyun  * };
233*4882a593Smuzhiyun  */
234*4882a593Smuzhiyun int pmic_bind_children(struct udevice *pmic, ofnode parent,
235*4882a593Smuzhiyun 		       const struct pmic_child_info *child_info);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun /**
238*4882a593Smuzhiyun  * pmic_get: get the pmic device using its name
239*4882a593Smuzhiyun  *
240*4882a593Smuzhiyun  * @name - device name
241*4882a593Smuzhiyun  * @devp - returned pointer to the pmic device
242*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
243*4882a593Smuzhiyun  *
244*4882a593Smuzhiyun  * The returned devp device can be used with pmic_read/write calls
245*4882a593Smuzhiyun  */
246*4882a593Smuzhiyun int pmic_get(const char *name, struct udevice **devp);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun /**
249*4882a593Smuzhiyun  * pmic_reg_count: get the pmic register count
250*4882a593Smuzhiyun  *
251*4882a593Smuzhiyun  * The required pmic device can be obtained by 'pmic_get()'
252*4882a593Smuzhiyun  *
253*4882a593Smuzhiyun  * @dev - pointer to the UCLASS_PMIC device
254*4882a593Smuzhiyun  * @return register count value on success or negative value of errno.
255*4882a593Smuzhiyun  */
256*4882a593Smuzhiyun int pmic_reg_count(struct udevice *dev);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun /**
259*4882a593Smuzhiyun  * pmic_read/write: read/write to the UCLASS_PMIC device
260*4882a593Smuzhiyun  *
261*4882a593Smuzhiyun  * The required pmic device can be obtained by 'pmic_get()'
262*4882a593Smuzhiyun  *
263*4882a593Smuzhiyun  * @pmic   - pointer to the UCLASS_PMIC device
264*4882a593Smuzhiyun  * @reg    - device register offset
265*4882a593Smuzhiyun  * @buffer - pointer to read/write buffer
266*4882a593Smuzhiyun  * @len    - byte count for read/write
267*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
268*4882a593Smuzhiyun  */
269*4882a593Smuzhiyun int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len);
270*4882a593Smuzhiyun int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun /**
273*4882a593Smuzhiyun  * pmic_reg_read() - read a PMIC register value
274*4882a593Smuzhiyun  *
275*4882a593Smuzhiyun  * @dev:	PMIC device to read
276*4882a593Smuzhiyun  * @reg:	Register to read
277*4882a593Smuzhiyun  * @return value read on success or negative value of errno.
278*4882a593Smuzhiyun  */
279*4882a593Smuzhiyun int pmic_reg_read(struct udevice *dev, uint reg);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun /**
282*4882a593Smuzhiyun  * pmic_reg_write() - write a PMIC register value
283*4882a593Smuzhiyun  *
284*4882a593Smuzhiyun  * @dev:	PMIC device to write
285*4882a593Smuzhiyun  * @reg:	Register to write
286*4882a593Smuzhiyun  * @value:	Value to write
287*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
288*4882a593Smuzhiyun  */
289*4882a593Smuzhiyun int pmic_reg_write(struct udevice *dev, uint reg, uint value);
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun /**
292*4882a593Smuzhiyun  * pmic_clrsetbits() - clear and set bits in a PMIC register
293*4882a593Smuzhiyun  *
294*4882a593Smuzhiyun  * This reads a register, optionally clears some bits, optionally sets some
295*4882a593Smuzhiyun  * bits, then writes the register.
296*4882a593Smuzhiyun  *
297*4882a593Smuzhiyun  * @dev:	PMIC device to update
298*4882a593Smuzhiyun  * @reg:	Register to update
299*4882a593Smuzhiyun  * @clr:	Bit mask to clear (set those bits that you want cleared)
300*4882a593Smuzhiyun  * @set:	Bit mask to set (set those bits that you want set)
301*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
302*4882a593Smuzhiyun  */
303*4882a593Smuzhiyun int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun /**
306*4882a593Smuzhiyun  * pmic_suspend() - suspend of PMIC
307*4882a593Smuzhiyun  *
308*4882a593Smuzhiyun  * @dev:	PMIC device
309*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
310*4882a593Smuzhiyun  */
311*4882a593Smuzhiyun int pmic_suspend(struct udevice *dev);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun /**
314*4882a593Smuzhiyun  * pmic_resume() - resume of PMIC
315*4882a593Smuzhiyun  *
316*4882a593Smuzhiyun  * @dev:	PMIC device
317*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
318*4882a593Smuzhiyun  */
319*4882a593Smuzhiyun int pmic_resume(struct udevice *dev);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun /**
322*4882a593Smuzhiyun  * pmic_shutdown() - power off supplies of PMIC
323*4882a593Smuzhiyun  *
324*4882a593Smuzhiyun  * @dev:	PMIC device to update
325*4882a593Smuzhiyun  * @return 0 on success or negative value of errno.
326*4882a593Smuzhiyun  */
327*4882a593Smuzhiyun int pmic_shutdown(struct udevice *dev);
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun #endif /* CONFIG_DM_PMIC */
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun #ifdef CONFIG_POWER
332*4882a593Smuzhiyun int pmic_init(unsigned char bus);
333*4882a593Smuzhiyun int power_init_board(void);
334*4882a593Smuzhiyun int pmic_dialog_init(unsigned char bus);
335*4882a593Smuzhiyun int check_reg(struct pmic *p, u32 reg);
336*4882a593Smuzhiyun struct pmic *pmic_alloc(void);
337*4882a593Smuzhiyun struct pmic *pmic_get(const char *s);
338*4882a593Smuzhiyun int pmic_probe(struct pmic *p);
339*4882a593Smuzhiyun int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
340*4882a593Smuzhiyun int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
341*4882a593Smuzhiyun int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
342*4882a593Smuzhiyun #endif
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun #define pmic_i2c_addr (p->hw.i2c.addr)
345*4882a593Smuzhiyun #define pmic_i2c_tx_num (p->hw.i2c.tx_num)
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun #define pmic_spi_bitlen (p->hw.spi.bitlen)
348*4882a593Smuzhiyun #define pmic_spi_flags (p->hw.spi.flags)
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun #endif /* __CORE_PMIC_H_ */
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