1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2015 Freescale Semiconductor, Inc 3*4882a593Smuzhiyun * Peng Fan <Peng.Fan@freescale.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef __PFUZE3000_PMIC_H_ 8*4882a593Smuzhiyun #define __PFUZE3000_PMIC_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* PFUZE3000 registers */ 11*4882a593Smuzhiyun enum { 12*4882a593Smuzhiyun PFUZE3000_DEVICEID = 0x00, 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun PFUZE3000_REVID = 0x03, 15*4882a593Smuzhiyun PFUZE3000_FABID = 0x04, 16*4882a593Smuzhiyun PFUZE3000_INTSTAT0 = 0x05, 17*4882a593Smuzhiyun PFUZE3000_INTMASK0 = 0x06, 18*4882a593Smuzhiyun PFUZE3000_INTSENSE0 = 0x07, 19*4882a593Smuzhiyun PFUZE3000_INTSTAT1 = 0x08, 20*4882a593Smuzhiyun PFUZE3000_INTMASK1 = 0x09, 21*4882a593Smuzhiyun PFUZE3000_INTSENSE1 = 0x0A, 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun PFUZE3000_INTSTAT3 = 0x0E, 24*4882a593Smuzhiyun PFUZE3000_INTMASK3 = 0x0F, 25*4882a593Smuzhiyun PFUZE3000_INTSENSE3 = 0x10, 26*4882a593Smuzhiyun PFUZE3000_INTSTAT4 = 0x11, 27*4882a593Smuzhiyun PFUZE3000_INTMASK4 = 0x12, 28*4882a593Smuzhiyun PFUZE3000_INTSENSE4 = 0x13, 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun PFUZE3000_COINCTL = 0x1A, 31*4882a593Smuzhiyun PFUZE3000_PWRCTL = 0x1B, 32*4882a593Smuzhiyun PFUZE3000_MEMA = 0x1C, 33*4882a593Smuzhiyun PFUZE3000_MEMB = 0x1D, 34*4882a593Smuzhiyun PFUZE3000_MEMC = 0x1E, 35*4882a593Smuzhiyun PFUZE3000_MEMD = 0x1F, 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun PFUZE3000_SW1AVOLT = 0x20, 38*4882a593Smuzhiyun PFUZE3000_SW1ASTBY = 0x21, 39*4882a593Smuzhiyun PFUZE3000_SW1AOFF = 0x22, 40*4882a593Smuzhiyun PFUZE3000_SW1AMODE = 0x23, 41*4882a593Smuzhiyun PFUZE3000_SW1ACONF = 0x24, 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun PFUZE3000_SW1BVOLT = 0x2E, 44*4882a593Smuzhiyun PFUZE3000_SW1BSTBY = 0x2F, 45*4882a593Smuzhiyun PFUZE3000_SW1BOFF = 0x30, 46*4882a593Smuzhiyun PFUZE3000_SW1BMODE = 0x31, 47*4882a593Smuzhiyun PFUZE3000_SW1BCONF = 0x32, 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun PFUZE3000_SW2VOLT = 0x35, 50*4882a593Smuzhiyun PFUZE3000_SW2STBY = 0x36, 51*4882a593Smuzhiyun PFUZE3000_SW2OFF = 0x37, 52*4882a593Smuzhiyun PFUZE3000_SW2MODE = 0x38, 53*4882a593Smuzhiyun PFUZE3000_SW2CONF = 0x39, 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun PFUZE3000_SW3VOLT = 0x3C, 56*4882a593Smuzhiyun PFUZE3000_SW3STBY = 0x3D, 57*4882a593Smuzhiyun PFUZE3000_SW3OFF = 0x3E, 58*4882a593Smuzhiyun PFUZE3000_SW3MODE = 0x3F, 59*4882a593Smuzhiyun PFUZE3000_SW3CONF = 0x40, 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun PFUZE3000_SWBSTCTL = 0x66, 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun PFUZE3000_LDOGCTL = 0x69, 64*4882a593Smuzhiyun PFUZE3000_VREFDDRCTL = 0x6A, 65*4882a593Smuzhiyun PFUZE3000_VSNVSCTL = 0x6B, 66*4882a593Smuzhiyun PFUZE3000_VLDO1CTL = 0x6C, 67*4882a593Smuzhiyun PFUZE3000_VLDO2CTL = 0x6D, 68*4882a593Smuzhiyun PFUZE3000_VCC_SDCTL = 0x6E, 69*4882a593Smuzhiyun PFUZE3000_V33CTL = 0x6F, 70*4882a593Smuzhiyun PFUZE3000_VLDO3CTL = 0x70, 71*4882a593Smuzhiyun PFUZE3000_VLD4CTL = 0x71, 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun PMIC_NUM_OF_REGS = 0x7F, 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun int power_pfuze3000_init(unsigned char bus); 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* Voltage Configuration */ 79*4882a593Smuzhiyun #define PFUZE3000_SW1AB_SETP(x) ((x - 7000) / 250) 80*4882a593Smuzhiyun #define PFUZE3000_SW3_SETP(x) ((x - 9000) / 500) 81*4882a593Smuzhiyun #define PFUZE3000_VLDO_SETP(x) ((x - 8000) / 500) 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #endif 84