1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2011 Samsung Electronics 3*4882a593Smuzhiyun * Lukasz Majewski <l.majewski@samsung.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __MAX8997_PMIC_H_ 9*4882a593Smuzhiyun #define __MAX8997_PMIC_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* MAX 8997 registers */ 12*4882a593Smuzhiyun enum { 13*4882a593Smuzhiyun MAX8997_REG_PMIC_ID0 = 0x00, 14*4882a593Smuzhiyun MAX8997_REG_PMIC_ID1 = 0x01, 15*4882a593Smuzhiyun MAX8997_REG_INTSRC = 0x02, 16*4882a593Smuzhiyun MAX8997_REG_INT1 = 0x03, 17*4882a593Smuzhiyun MAX8997_REG_INT2 = 0x04, 18*4882a593Smuzhiyun MAX8997_REG_INT3 = 0x05, 19*4882a593Smuzhiyun MAX8997_REG_INT4 = 0x06, 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun MAX8997_REG_INT1MSK = 0x08, 22*4882a593Smuzhiyun MAX8997_REG_INT2MSK = 0x09, 23*4882a593Smuzhiyun MAX8997_REG_INT3MSK = 0x0a, 24*4882a593Smuzhiyun MAX8997_REG_INT4MSK = 0x0b, 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun MAX8997_REG_STATUS1 = 0x0d, 27*4882a593Smuzhiyun MAX8997_REG_STATUS2 = 0x0e, 28*4882a593Smuzhiyun MAX8997_REG_STATUS3 = 0x0f, 29*4882a593Smuzhiyun MAX8997_REG_STATUS4 = 0x10, 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun MAX8997_REG_MAINCON1 = 0x13, 32*4882a593Smuzhiyun MAX8997_REG_MAINCON2 = 0x14, 33*4882a593Smuzhiyun MAX8997_REG_BUCKRAMP = 0x15, 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun MAX8997_REG_BUCK1CTRL = 0x18, 36*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS1 = 0x19, 37*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS2 = 0x1a, 38*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS3 = 0x1b, 39*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS4 = 0x1c, 40*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS5 = 0x1d, 41*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS6 = 0x1e, 42*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS7 = 0x1f, 43*4882a593Smuzhiyun MAX8997_REG_BUCK1DVS8 = 0x20, 44*4882a593Smuzhiyun MAX8997_REG_BUCK2CTRL = 0x21, 45*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS1 = 0x22, 46*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS2 = 0x23, 47*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS3 = 0x24, 48*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS4 = 0x25, 49*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS5 = 0x26, 50*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS6 = 0x27, 51*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS7 = 0x28, 52*4882a593Smuzhiyun MAX8997_REG_BUCK2DVS8 = 0x29, 53*4882a593Smuzhiyun MAX8997_REG_BUCK3CTRL = 0x2a, 54*4882a593Smuzhiyun MAX8997_REG_BUCK3DVS = 0x2b, 55*4882a593Smuzhiyun MAX8997_REG_BUCK4CTRL = 0x2c, 56*4882a593Smuzhiyun MAX8997_REG_BUCK4DVS = 0x2d, 57*4882a593Smuzhiyun MAX8997_REG_BUCK5CTRL = 0x2e, 58*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS1 = 0x2f, 59*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS2 = 0x30, 60*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS3 = 0x31, 61*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS4 = 0x32, 62*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS5 = 0x33, 63*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS6 = 0x34, 64*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS7 = 0x35, 65*4882a593Smuzhiyun MAX8997_REG_BUCK5DVS8 = 0x36, 66*4882a593Smuzhiyun MAX8997_REG_BUCK6CTRL = 0x37, 67*4882a593Smuzhiyun MAX8997_REG_BUCK6BPSKIPCTRL = 0x38, 68*4882a593Smuzhiyun MAX8997_REG_BUCK7CTRL = 0x39, 69*4882a593Smuzhiyun MAX8997_REG_BUCK7DVS = 0x3a, 70*4882a593Smuzhiyun MAX8997_REG_LDO1CTRL = 0x3b, 71*4882a593Smuzhiyun MAX8997_REG_LDO2CTRL = 0x3c, 72*4882a593Smuzhiyun MAX8997_REG_LDO3CTRL = 0x3d, 73*4882a593Smuzhiyun MAX8997_REG_LDO4CTRL = 0x3e, 74*4882a593Smuzhiyun MAX8997_REG_LDO5CTRL = 0x3f, 75*4882a593Smuzhiyun MAX8997_REG_LDO6CTRL = 0x40, 76*4882a593Smuzhiyun MAX8997_REG_LDO7CTRL = 0x41, 77*4882a593Smuzhiyun MAX8997_REG_LDO8CTRL = 0x42, 78*4882a593Smuzhiyun MAX8997_REG_LDO9CTRL = 0x43, 79*4882a593Smuzhiyun MAX8997_REG_LDO10CTRL = 0x44, 80*4882a593Smuzhiyun MAX8997_REG_LDO11CTRL = 0x45, 81*4882a593Smuzhiyun MAX8997_REG_LDO12CTRL = 0x46, 82*4882a593Smuzhiyun MAX8997_REG_LDO13CTRL = 0x47, 83*4882a593Smuzhiyun MAX8997_REG_LDO14CTRL = 0x48, 84*4882a593Smuzhiyun MAX8997_REG_LDO15CTRL = 0x49, 85*4882a593Smuzhiyun MAX8997_REG_LDO16CTRL = 0x4a, 86*4882a593Smuzhiyun MAX8997_REG_LDO17CTRL = 0x4b, 87*4882a593Smuzhiyun MAX8997_REG_LDO18CTRL = 0x4c, 88*4882a593Smuzhiyun MAX8997_REG_LDO21CTRL = 0x4d, 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun MAX8997_REG_MBCCTRL1 = 0x50, 91*4882a593Smuzhiyun MAX8997_REG_MBCCTRL2 = 0x51, 92*4882a593Smuzhiyun MAX8997_REG_MBCCTRL3 = 0x52, 93*4882a593Smuzhiyun MAX8997_REG_MBCCTRL4 = 0x53, 94*4882a593Smuzhiyun MAX8997_REG_MBCCTRL5 = 0x54, 95*4882a593Smuzhiyun MAX8997_REG_MBCCTRL6 = 0x55, 96*4882a593Smuzhiyun MAX8997_REG_OTPCGHCVS = 0x56, 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun MAX8997_REG_SAFEOUTCTRL = 0x5a, 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun MAX8997_REG_LBCNFG1 = 0x5e, 101*4882a593Smuzhiyun MAX8997_REG_LBCNFG2 = 0x5f, 102*4882a593Smuzhiyun MAX8997_REG_BBCCTRL = 0x60, 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */ 105*4882a593Smuzhiyun MAX8997_REG_FLASH2_CUR = 0x64, 106*4882a593Smuzhiyun MAX8997_REG_MOVIE_CUR = 0x65, 107*4882a593Smuzhiyun MAX8997_REG_GSMB_CUR = 0x66, 108*4882a593Smuzhiyun MAX8997_REG_BOOST_CNTL = 0x67, 109*4882a593Smuzhiyun MAX8997_REG_LEN_CNTL = 0x68, 110*4882a593Smuzhiyun MAX8997_REG_FLASH_CNTL = 0x69, 111*4882a593Smuzhiyun MAX8997_REG_WDT_CNTL = 0x6a, 112*4882a593Smuzhiyun MAX8997_REG_MAXFLASH1 = 0x6b, 113*4882a593Smuzhiyun MAX8997_REG_MAXFLASH2 = 0x6c, 114*4882a593Smuzhiyun MAX8997_REG_FLASHSTATUS = 0x6d, 115*4882a593Smuzhiyun MAX8997_REG_FLASHSTATUSMASK = 0x6e, 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL1 = 0x70, 118*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL2 = 0x71, 119*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL3 = 0x72, 120*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL4 = 0x73, 121*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL5 = 0x74, 122*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL6 = 0x75, 123*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL7 = 0x76, 124*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL8 = 0x77, 125*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL9 = 0x78, 126*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL10 = 0x79, 127*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL11 = 0x7a, 128*4882a593Smuzhiyun MAX8997_REG_GPIOCNTL12 = 0x7b, 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun MAX8997_REG_LDO1CONFIG = 0x80, 131*4882a593Smuzhiyun MAX8997_REG_LDO2CONFIG = 0x81, 132*4882a593Smuzhiyun MAX8997_REG_LDO3CONFIG = 0x82, 133*4882a593Smuzhiyun MAX8997_REG_LDO4CONFIG = 0x83, 134*4882a593Smuzhiyun MAX8997_REG_LDO5CONFIG = 0x84, 135*4882a593Smuzhiyun MAX8997_REG_LDO6CONFIG = 0x85, 136*4882a593Smuzhiyun MAX8997_REG_LDO7CONFIG = 0x86, 137*4882a593Smuzhiyun MAX8997_REG_LDO8CONFIG = 0x87, 138*4882a593Smuzhiyun MAX8997_REG_LDO9CONFIG = 0x88, 139*4882a593Smuzhiyun MAX8997_REG_LDO10CONFIG = 0x89, 140*4882a593Smuzhiyun MAX8997_REG_LDO11CONFIG = 0x8a, 141*4882a593Smuzhiyun MAX8997_REG_LDO12CONFIG = 0x8b, 142*4882a593Smuzhiyun MAX8997_REG_LDO13CONFIG = 0x8c, 143*4882a593Smuzhiyun MAX8997_REG_LDO14CONFIG = 0x8d, 144*4882a593Smuzhiyun MAX8997_REG_LDO15CONFIG = 0x8e, 145*4882a593Smuzhiyun MAX8997_REG_LDO16CONFIG = 0x8f, 146*4882a593Smuzhiyun MAX8997_REG_LDO17CONFIG = 0x90, 147*4882a593Smuzhiyun MAX8997_REG_LDO18CONFIG = 0x91, 148*4882a593Smuzhiyun MAX8997_REG_LDO21CONFIG = 0x92, 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun MAX8997_REG_DVSOKTIMER1 = 0x97, 151*4882a593Smuzhiyun MAX8997_REG_DVSOKTIMER2 = 0x98, 152*4882a593Smuzhiyun MAX8997_REG_DVSOKTIMER4 = 0x99, 153*4882a593Smuzhiyun MAX8997_REG_DVSOKTIMER5 = 0x9a, 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun PMIC_NUM_OF_REGS = 0x9b, 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun #define ACTDISSAFEO1 (1 << 4) 159*4882a593Smuzhiyun #define ACTDISSAFEO2 (1 << 5) 160*4882a593Smuzhiyun #define ENSAFEOUT1 (1 << 6) 161*4882a593Smuzhiyun #define ENSAFEOUT2 (1 << 7) 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #define ENBUCK (1 << 0) 164*4882a593Smuzhiyun #define ACTIVE_DISCHARGE (1 << 3) 165*4882a593Smuzhiyun #define GNSLCT (1 << 2) 166*4882a593Smuzhiyun #define LDO_ADE (1 << 1) 167*4882a593Smuzhiyun #define SAFEOUT_4_85V 0x00 168*4882a593Smuzhiyun #define SAFEOUT_4_90V 0x01 169*4882a593Smuzhiyun #define SAFEOUT_4_95V 0x02 170*4882a593Smuzhiyun #define SAFEOUT_3_30V 0x03 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /* Charger */ 173*4882a593Smuzhiyun #define DETBAT (1 << 2) 174*4882a593Smuzhiyun #define MBCICHFCSET (1 << 4) 175*4882a593Smuzhiyun #define MBCHOSTEN (1 << 6) 176*4882a593Smuzhiyun #define VCHGR_FC (1 << 7) 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun #define CHARGER_MIN_CURRENT 200 179*4882a593Smuzhiyun #define CHARGER_MAX_CURRENT 950 180*4882a593Smuzhiyun #define CHARGER_CURRENT_RESOLUTION 50 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun #define MAX8997_I2C_ADDR (0xCC >> 1) 183*4882a593Smuzhiyun #define MAX8997_RTC_ADDR (0x0C >> 1) 184*4882a593Smuzhiyun #define MAX8997_MUIC_ADDR (0x4A >> 1) 185*4882a593Smuzhiyun #define MAX8997_FG_ADDR (0x6C >> 1) 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun enum { 188*4882a593Smuzhiyun LDO_OFF = 0, 189*4882a593Smuzhiyun LDO_ON = 1, 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun DIS_LDO = (0x00 << 6), 192*4882a593Smuzhiyun EN_LDO = (0x3 << 6), 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun #define MAX8997_LDO_MAX_VAL 0x3F 196*4882a593Smuzhiyun unsigned char max8997_reg_ldo(int uV); 197*4882a593Smuzhiyun #endif /* __MAX8997_PMIC_H_ */ 198