1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2012 Samsung Electronics 3*4882a593Smuzhiyun * Lukasz Majewski <l.majewski@samsung.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __MAX8997_MUIC_H_ 9*4882a593Smuzhiyun #define __MAX8997_MUIC_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <power/power_chrg.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* MAX8997_MUIC_STATUS2 */ 14*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_NO 0x00 15*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_USB 0x01 16*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_USB_D 0x02 17*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_TA 0x03 18*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_TA_500 0x04 19*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_TA_1A 0x05 20*4882a593Smuzhiyun #define MAX8997_MUIC_CHG_MASK 0x07 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* MAX 8997 MUIC registers */ 23*4882a593Smuzhiyun enum { 24*4882a593Smuzhiyun MAX8997_MUIC_ID = 0x00, 25*4882a593Smuzhiyun MAX8997_MUIC_INT1 = 0x01, 26*4882a593Smuzhiyun MAX8997_MUIC_INT2 = 0x02, 27*4882a593Smuzhiyun MAX8997_MUIC_INT3 = 0x03, 28*4882a593Smuzhiyun MAX8997_MUIC_STATUS1 = 0x04, 29*4882a593Smuzhiyun MAX8997_MUIC_STATUS2 = 0x05, 30*4882a593Smuzhiyun MAX8997_MUIC_STATUS3 = 0x06, 31*4882a593Smuzhiyun MAX8997_MUIC_INTMASK1 = 0x07, 32*4882a593Smuzhiyun MAX8997_MUIC_INTMASK2 = 0x08, 33*4882a593Smuzhiyun MAX8997_MUIC_INTMASK3 = 0x09, 34*4882a593Smuzhiyun MAX8997_MUIC_CDETCTRL = 0x0A, 35*4882a593Smuzhiyun MAX8997_MUIC_CONTROL1 = 0x0C, 36*4882a593Smuzhiyun MAX8997_MUIC_CONTROL2 = 0x0D, 37*4882a593Smuzhiyun MAX8997_MUIC_CONTROL3 = 0x0E, 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun MUIC_NUM_OF_REGS = 0x0F, 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define MAX8997_MUIC_I2C_ADDR (0x4A >> 1) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun int power_muic_init(unsigned int bus); 45*4882a593Smuzhiyun #endif /* __MAX8997_MUIC_H_ */ 46