1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2012 Samsung Electronics 3*4882a593Smuzhiyun * Lukasz Majewski <l.majewski@samsung.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __MAX17042_FG_H_ 9*4882a593Smuzhiyun #define __MAX17042_FG_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* MAX 17042 registers */ 12*4882a593Smuzhiyun enum { 13*4882a593Smuzhiyun MAX17042_STATUS = 0x00, 14*4882a593Smuzhiyun MAX17042_SOCREP = 0x06, 15*4882a593Smuzhiyun MAX17042_VCELL = 0x09, 16*4882a593Smuzhiyun MAX17042_CURRENT = 0x0A, 17*4882a593Smuzhiyun MAX17042_AVG_CURRENT = 0x0B, 18*4882a593Smuzhiyun MAX17042_SOCMIX = 0x0D, 19*4882a593Smuzhiyun MAX17042_SOCAV = 0x0E, 20*4882a593Smuzhiyun MAX17042_DESIGN_CAP = 0x18, 21*4882a593Smuzhiyun MAX17042_AVG_VCELL = 0x19, 22*4882a593Smuzhiyun MAX17042_CONFIG = 0x1D, 23*4882a593Smuzhiyun MAX17042_VERSION = 0x21, 24*4882a593Smuzhiyun MAX17042_LEARNCFG = 0x28, 25*4882a593Smuzhiyun MAX17042_FILTERCFG = 0x29, 26*4882a593Smuzhiyun MAX17042_RELAXCFG = 0x2A, 27*4882a593Smuzhiyun MAX17042_MISCCFG = 0x2B, 28*4882a593Smuzhiyun MAX17042_CGAIN = 0x2E, 29*4882a593Smuzhiyun MAX17042_COFF = 0x2F, 30*4882a593Smuzhiyun MAX17042_RCOMP0 = 0x38, 31*4882a593Smuzhiyun MAX17042_TEMPCO = 0x39, 32*4882a593Smuzhiyun MAX17042_FSTAT = 0x3D, 33*4882a593Smuzhiyun MAX17042_MLOCKReg1 = 0x62, 34*4882a593Smuzhiyun MAX17042_MLOCKReg2 = 0x63, 35*4882a593Smuzhiyun MAX17042_MODEL1 = 0x80, 36*4882a593Smuzhiyun MAX17042_MODEL2 = 0x90, 37*4882a593Smuzhiyun MAX17042_MODEL3 = 0xA0, 38*4882a593Smuzhiyun MAX17042_VFOCV = 0xFB, 39*4882a593Smuzhiyun MAX17042_VFSOC = 0xFF, 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun FG_NUM_OF_REGS = 0x100, 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define RCOMP0 0x0060 45*4882a593Smuzhiyun #define TempCo 0x1015 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define MAX17042_POR (1 << 1) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define MODEL_UNLOCK1 0x0059 51*4882a593Smuzhiyun #define MODEL_UNLOCK2 0x00c4 52*4882a593Smuzhiyun #define MODEL_LOCK1 0x0000 53*4882a593Smuzhiyun #define MODEL_LOCK2 0x0000 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define MAX17042_I2C_ADDR (0x6C >> 1) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun int power_fg_init(unsigned char bus); 58*4882a593Smuzhiyun #endif /* __MAX17042_FG_H_ */ 59