1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2017, Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * hisping lin, <hisping.lin@rock-chips.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef _OPTEECLIENTTEST_H_ 8*4882a593Smuzhiyun #define _OPTEECLIENTTEST_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <optee_include/tee_client_api.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun enum RK_OEM_OTP_KEYID { 13*4882a593Smuzhiyun RK_OEM_OTP_KEY0 = 0, 14*4882a593Smuzhiyun RK_OEM_OTP_KEY1 = 1, 15*4882a593Smuzhiyun RK_OEM_OTP_KEY2 = 2, 16*4882a593Smuzhiyun RK_OEM_OTP_KEY3 = 3, 17*4882a593Smuzhiyun RK_OEM_OTP_KEY_FW = 10, //keyid of fw_encryption_key 18*4882a593Smuzhiyun RK_OEM_OTP_KEYMAX 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* Crypto mode */ 22*4882a593Smuzhiyun enum RK_CIPIHER_MODE { 23*4882a593Smuzhiyun RK_CIPHER_MODE_ECB = 0, 24*4882a593Smuzhiyun RK_CIPHER_MODE_CBC = 1, 25*4882a593Smuzhiyun RK_CIPHER_MODE_CTS = 2, 26*4882a593Smuzhiyun RK_CIPHER_MODE_CTR = 3, 27*4882a593Smuzhiyun RK_CIPHER_MODE_CFB = 4, 28*4882a593Smuzhiyun RK_CIPHER_MODE_OFB = 5, 29*4882a593Smuzhiyun RK_CIPHER_MODE_XTS = 6, 30*4882a593Smuzhiyun RK_CIPHER_MODE_CCM = 7, 31*4882a593Smuzhiyun RK_CIPHER_MODE_GCM = 8, 32*4882a593Smuzhiyun RK_CIPHER_MODE_CMAC = 9, 33*4882a593Smuzhiyun RK_CIPHER_MODE_CBC_MAC = 10, 34*4882a593Smuzhiyun RK_CIPHER_MODE_MAX 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* Crypto algorithm */ 38*4882a593Smuzhiyun enum RK_CRYPTO_ALGO { 39*4882a593Smuzhiyun RK_ALGO_AES = 1, 40*4882a593Smuzhiyun RK_ALGO_DES, 41*4882a593Smuzhiyun RK_ALGO_TDES, 42*4882a593Smuzhiyun RK_ALGO_SM4, 43*4882a593Smuzhiyun RK_ALGO_ALGO_MAX 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun typedef struct { 47*4882a593Smuzhiyun uint32_t algo; 48*4882a593Smuzhiyun uint32_t mode; 49*4882a593Smuzhiyun uint32_t operation; 50*4882a593Smuzhiyun uint8_t key[64]; 51*4882a593Smuzhiyun uint32_t key_len; 52*4882a593Smuzhiyun uint8_t iv[16]; 53*4882a593Smuzhiyun void *reserved; 54*4882a593Smuzhiyun } rk_cipher_config; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* Crypto operation */ 57*4882a593Smuzhiyun #define RK_MODE_ENCRYPT 1 58*4882a593Smuzhiyun #define RK_MODE_DECRYPT 0 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define AES_BLOCK_SIZE 16 61*4882a593Smuzhiyun #define SM4_BLOCK_SIZE 16 62*4882a593Smuzhiyun #define RK_CRYPTO_MAX_DATA_LEN (1 * 1024 * 1024) 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define ATAP_HEX_UUID_LEN 32 65*4882a593Smuzhiyun #define ATTEST_DH_SIZE 8 66*4882a593Smuzhiyun #define ATTEST_UUID_SIZE (ATAP_HEX_UUID_LEN+1) 67*4882a593Smuzhiyun #define ATTEST_CA_OUT_SIZE 256 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value); 70*4882a593Smuzhiyun uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value); 71*4882a593Smuzhiyun uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size); 72*4882a593Smuzhiyun uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size); 73*4882a593Smuzhiyun uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes, 74*4882a593Smuzhiyun uint32_t size); 75*4882a593Smuzhiyun uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes, 76*4882a593Smuzhiyun uint32_t size); 77*4882a593Smuzhiyun uint32_t trusty_read_lock_state(uint8_t *lock_state); 78*4882a593Smuzhiyun uint32_t trusty_write_lock_state(uint8_t lock_state); 79*4882a593Smuzhiyun uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state); 80*4882a593Smuzhiyun uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state); 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length); 83*4882a593Smuzhiyun uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length); 84*4882a593Smuzhiyun uint32_t trusty_notify_optee_uboot_end(void); 85*4882a593Smuzhiyun uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length); 86*4882a593Smuzhiyun uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length); 87*4882a593Smuzhiyun uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag); 88*4882a593Smuzhiyun uint32_t trusty_write_ta_encryption_key(uint32_t *buf, uint32_t length); 89*4882a593Smuzhiyun uint32_t trusty_check_security_level_flag(uint8_t flag); 90*4882a593Smuzhiyun uint32_t trusty_write_oem_huk(uint32_t *buf, uint32_t length); 91*4882a593Smuzhiyun void trusty_select_security_level(void); 92*4882a593Smuzhiyun uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes); 93*4882a593Smuzhiyun uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes); 94*4882a593Smuzhiyun uint32_t trusty_write_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len); 95*4882a593Smuzhiyun uint32_t trusty_read_oem_ns_otp(uint32_t byte_off, uint8_t *byte_buf, uint32_t byte_len); 96*4882a593Smuzhiyun uint32_t trusty_write_oem_otp_key(enum RK_OEM_OTP_KEYID key_id, 97*4882a593Smuzhiyun uint8_t *byte_buf, uint32_t byte_len); 98*4882a593Smuzhiyun uint32_t trusty_oem_otp_key_is_written(enum RK_OEM_OTP_KEYID key_id, uint8_t *value); 99*4882a593Smuzhiyun uint32_t trusty_set_oem_hr_otp_read_lock(enum RK_OEM_OTP_KEYID key_id); 100*4882a593Smuzhiyun uint32_t trusty_oem_otp_key_cipher(enum RK_OEM_OTP_KEYID key_id, rk_cipher_config *config, 101*4882a593Smuzhiyun uint32_t src_phys_addr, uint32_t dst_phys_addr, 102*4882a593Smuzhiyun uint32_t len); 103*4882a593Smuzhiyun uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size); 104*4882a593Smuzhiyun uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size); 105*4882a593Smuzhiyun uint32_t trusty_attest_get_ca 106*4882a593Smuzhiyun (uint8_t *operation_start, uint32_t *operation_size, 107*4882a593Smuzhiyun uint8_t *out, uint32_t *out_len); 108*4882a593Smuzhiyun uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size); 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #endif 111