1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Stefan Roese <sr@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _NUVOTON_NCT6102D_H_ 8*4882a593Smuzhiyun #define _NUVOTON_NCT6102D_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* I/O address of Nuvoton Super IO chip */ 11*4882a593Smuzhiyun #define NCT6102D_IO_PORT 0x4e 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* Extended Function Enable Registers */ 14*4882a593Smuzhiyun #define NCT_EFER (NCT6102D_IO_PORT + 0) 15*4882a593Smuzhiyun /* Extended Function Index Register (same as EFER) */ 16*4882a593Smuzhiyun #define NCT_EFIR (NCT6102D_IO_PORT + 0) 17*4882a593Smuzhiyun /* Extended Function Data Register */ 18*4882a593Smuzhiyun #define NCT_EFDR (NCT_EFIR + 1) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define NCT_LD_SELECT_REG 0x07 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* Logical device number */ 23*4882a593Smuzhiyun #define NCT6102D_LD_UARTA 0x02 24*4882a593Smuzhiyun #define NCT6102D_LD_WDT 0x08 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define NCT6102D_UARTA_ENABLE 0x30 27*4882a593Smuzhiyun #define NCT6102D_WDT_TIMEOUT 0xf1 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define NCT_ENTRY_KEY 0x87 30*4882a593Smuzhiyun #define NCT_EXIT_KEY 0xaa 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun int nct6102d_wdt_disable(void); 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif /* _NUVOTON_NCT6102D_H_ */ 35