1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2010 3*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com> 4*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __MVMFP_H 10*4882a593Smuzhiyun #define __MVMFP_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * Header file for MultiFunctionPin (MFP) Configururation framework 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * Processors Supported: 16*4882a593Smuzhiyun * 1. Marvell ARMADA100 Processors 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * processor to be supported should be added here 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* 22*4882a593Smuzhiyun * MFP configuration is represented by a 32-bit unsigned integer 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun #ifdef CONFIG_MVMFP_V2 25*4882a593Smuzhiyun #define MFP(_off, _pull, _drv, _slp, _edge, _sleep, _afn) ( \ 26*4882a593Smuzhiyun /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \ 27*4882a593Smuzhiyun /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \ 28*4882a593Smuzhiyun /* bit 12..11 - Driver Strength */ (((_drv) & 0x3) << 11) | \ 29*4882a593Smuzhiyun /* bits 10 - pad driver */ (((_slp) & 0x1) << 10) | \ 30*4882a593Smuzhiyun /* bit 09..07 - sleep mode */ (((_sleep) & 0xe) << 6) | \ 31*4882a593Smuzhiyun /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \ 32*4882a593Smuzhiyun /* bits 03 - sleep mode */ (((_sleep) & 0x1) << 3) | \ 33*4882a593Smuzhiyun /* bits 02..00 - Alt-fun select */ ((_afn) & 0x7)) 34*4882a593Smuzhiyun #else 35*4882a593Smuzhiyun #define MFP(_off, _pull, _drv, _slp, _edge, _sleep, _afn) ( \ 36*4882a593Smuzhiyun /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \ 37*4882a593Smuzhiyun /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \ 38*4882a593Smuzhiyun /* bit 12 - Unused */ \ 39*4882a593Smuzhiyun /* bits 11..10 - Driver Strength */ (((_drv) & 0x3) << 10) | \ 40*4882a593Smuzhiyun /* bit 09..07 - sleep mode */ (((_sleep) & 0xe) << 6) | \ 41*4882a593Smuzhiyun /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \ 42*4882a593Smuzhiyun /* bits 03 - sleep mode */ (((_sleep) & 0x1) << 3) | \ 43*4882a593Smuzhiyun /* bits 02..00 - Alt-fun select */ ((_afn) & 0x7)) 44*4882a593Smuzhiyun #endif 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* 47*4882a593Smuzhiyun * to facilitate the definition, the following macros are provided 48*4882a593Smuzhiyun * 49*4882a593Smuzhiyun * offset, pull,pF, drv,dF, edge,eF ,afn,aF 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun #define MFP_OFFSET_MASK MFP(0xffff, 0, 0, 0, 0, 0, 0) 52*4882a593Smuzhiyun #define MFP_REG(x) MFP(x, 0, 0, 0, 0, 0, 0) 53*4882a593Smuzhiyun #define MFP_REG_GET_OFFSET(x) ((x & MFP_OFFSET_MASK) >> 16) 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define MFP_AF0 MFP(0x0000, 0, 0, 0, 0, 0, 0) 56*4882a593Smuzhiyun #define MFP_AF1 MFP(0x0000, 0, 0, 0, 0, 0, 1) 57*4882a593Smuzhiyun #define MFP_AF2 MFP(0x0000, 0, 0, 0, 0, 0, 2) 58*4882a593Smuzhiyun #define MFP_AF3 MFP(0x0000, 0, 0, 0, 0, 0, 3) 59*4882a593Smuzhiyun #define MFP_AF4 MFP(0x0000, 0, 0, 0, 0, 0, 4) 60*4882a593Smuzhiyun #define MFP_AF5 MFP(0x0000, 0, 0, 0, 0, 0, 5) 61*4882a593Smuzhiyun #define MFP_AF6 MFP(0x0000, 0, 0, 0, 0, 0, 6) 62*4882a593Smuzhiyun #define MFP_AF7 MFP(0x0000, 0, 0, 0, 0, 0, 7) 63*4882a593Smuzhiyun #define MFP_AF_MASK MFP(0x0000, 0, 0, 0, 0, 0, 7) 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define MFP_SLEEP_CTRL2 MFP(0x0000, 0, 0, 0, 0, 1, 0) 66*4882a593Smuzhiyun #define MFP_SLEEP_DIR MFP(0x0000, 0, 0, 0, 0, 2, 0) 67*4882a593Smuzhiyun #define MFP_SLEEP_DATA MFP(0x0000, 0, 0, 0, 0, 4, 0) 68*4882a593Smuzhiyun #define MFP_SLEEP_CTRL MFP(0x0000, 0, 0, 0, 0, 8, 0) 69*4882a593Smuzhiyun #define MFP_SLEEP_MASK MFP(0x0000, 0, 0, 0, 0, 0xf, 0) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define MFP_LPM_EDGE_NONE MFP(0x0000, 0, 0, 0, 4, 0, 0) 72*4882a593Smuzhiyun #define MFP_LPM_EDGE_RISE MFP(0x0000, 0, 0, 0, 1, 0, 0) 73*4882a593Smuzhiyun #define MFP_LPM_EDGE_FALL MFP(0x0000, 0, 0, 0, 2, 0, 0) 74*4882a593Smuzhiyun #define MFP_LPM_EDGE_BOTH MFP(0x0000, 0, 0, 0, 3, 0, 0) 75*4882a593Smuzhiyun #define MFP_LPM_EDGE_MASK MFP(0x0000, 0, 0, 0, 7, 0, 0) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #define MFP_SLP_DI MFP(0x0000, 0, 0, 1, 0, 0, 0) 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define MFP_DRIVE_VERY_SLOW MFP(0x0000, 0, 0, 0, 0, 0, 0) 80*4882a593Smuzhiyun #define MFP_DRIVE_SLOW MFP(0x0000, 0, 1, 0, 0, 0, 0) 81*4882a593Smuzhiyun #define MFP_DRIVE_MEDIUM MFP(0x0000, 0, 2, 0, 0, 0, 0) 82*4882a593Smuzhiyun #define MFP_DRIVE_FAST MFP(0x0000, 0, 3, 0, 0, 0, 0) 83*4882a593Smuzhiyun #define MFP_DRIVE_MASK MFP(0x0000, 0, 3, 0, 0, 0, 0) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #define MFP_PULL_NONE MFP(0x0000, 0, 0, 0, 0, 0, 0) 86*4882a593Smuzhiyun #define MFP_PULL_LOW MFP(0x0000, 5, 0, 0, 0, 0, 0) 87*4882a593Smuzhiyun #define MFP_PULL_HIGH MFP(0x0000, 6, 0, 0, 0, 0, 0) 88*4882a593Smuzhiyun #define MFP_PULL_BOTH MFP(0x0000, 7, 0, 0, 0, 0, 0) 89*4882a593Smuzhiyun #define MFP_PULL_FLOAT MFP(0x0000, 4, 0, 0, 0, 0, 0) 90*4882a593Smuzhiyun #define MFP_PULL_MASK MFP(0x0000, 7, 0, 0, 0, 0, 0) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define MFP_VALUE_MASK (MFP_PULL_MASK | MFP_DRIVE_MASK | MFP_SLP_DI \ 93*4882a593Smuzhiyun | MFP_LPM_EDGE_MASK | MFP_SLEEP_MASK \ 94*4882a593Smuzhiyun | MFP_AF_MASK) 95*4882a593Smuzhiyun #define MFP_EOC 0xffffffff /* indicates end-of-conf */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* Functions */ 98*4882a593Smuzhiyun void mfp_config(u32 *mfp_cfgs); 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #endif /* __MVMFP_H */ 101