1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * linux/include/linux/mtd/onenand.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2005-2007 Samsung Electronics 5*4882a593Smuzhiyun * Kyungmin Park <kyungmin.park@samsung.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 8*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 9*4882a593Smuzhiyun * published by the Free Software Foundation. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __LINUX_MTD_ONENAND_H 13*4882a593Smuzhiyun #define __LINUX_MTD_ONENAND_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <linux/mtd/onenand_regs.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* Note: The header order is impoertant */ 18*4882a593Smuzhiyun #include <onenand_uboot.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <linux/compat.h> 21*4882a593Smuzhiyun #include <linux/mtd/bbm.h> 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define MAX_DIES 2 24*4882a593Smuzhiyun #define MAX_BUFFERRAM 2 25*4882a593Smuzhiyun #define MAX_ONENAND_PAGESIZE (4096 + 128) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Scan and identify a OneNAND device */ 28*4882a593Smuzhiyun extern int onenand_scan (struct mtd_info *mtd, int max_chips); 29*4882a593Smuzhiyun /* Free resources held by the OneNAND device */ 30*4882a593Smuzhiyun extern void onenand_release (struct mtd_info *mtd); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /** 33*4882a593Smuzhiyun * struct onenand_bufferram - OneNAND BufferRAM Data 34*4882a593Smuzhiyun * @param blockpage block & page address in BufferRAM 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun struct onenand_bufferram { 37*4882a593Smuzhiyun int blockpage; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /** 41*4882a593Smuzhiyun * struct onenand_chip - OneNAND Private Flash Chip Data 42*4882a593Smuzhiyun * @param base [BOARDSPECIFIC] address to access OneNAND 43*4882a593Smuzhiyun * @dies: [INTERN][FLEXONENAND] number of dies on chip 44*4882a593Smuzhiyun * @boundary: [INTERN][FLEXONENAND] Boundary of the dies 45*4882a593Smuzhiyun * @diesize: [INTERN][FLEXONENAND] Size of the dies 46*4882a593Smuzhiyun * @param chipsize [INTERN] the size of one chip for multichip arrays 47*4882a593Smuzhiyun * @param device_id [INTERN] device ID 48*4882a593Smuzhiyun * @param verstion_id [INTERN] version ID 49*4882a593Smuzhiyun * @technology [INTERN] describes the internal NAND array technology such as SLC or MLC. 50*4882a593Smuzhiyun * @density_mask: [INTERN] chip density, used for DDP devices 51*4882a593Smuzhiyun * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about 52*4882a593Smuzhiyun * @param erase_shift [INTERN] number of address bits in a block 53*4882a593Smuzhiyun * @param page_shift [INTERN] number of address bits in a page 54*4882a593Smuzhiyun * @param ppb_shift [INTERN] number of address bits in a pages per block 55*4882a593Smuzhiyun * @param page_mask [INTERN] a page per block mask 56*4882a593Smuzhiyun * @param writesize [INTERN] a real page size 57*4882a593Smuzhiyun * @param bufferam_index [INTERN] BufferRAM index 58*4882a593Smuzhiyun * @param bufferam [INTERN] BufferRAM info 59*4882a593Smuzhiyun * @param readw [REPLACEABLE] hardware specific function for read short 60*4882a593Smuzhiyun * @param writew [REPLACEABLE] hardware specific function for write short 61*4882a593Smuzhiyun * @param command [REPLACEABLE] hardware specific function for writing commands to the chip 62*4882a593Smuzhiyun * @param wait [REPLACEABLE] hardware specific function for wait on ready 63*4882a593Smuzhiyun * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area 64*4882a593Smuzhiyun * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area 65*4882a593Smuzhiyun * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip 66*4882a593Smuzhiyun * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress 67*4882a593Smuzhiyun * @param state [INTERN] the current state of the OneNAND device 68*4882a593Smuzhiyun * @param autooob [REPLACEABLE] the default (auto)placement scheme 69*4882a593Smuzhiyun * @param priv [OPTIONAL] pointer to private chip date 70*4882a593Smuzhiyun */ 71*4882a593Smuzhiyun struct onenand_chip { 72*4882a593Smuzhiyun void __iomem *base; 73*4882a593Smuzhiyun unsigned int dies; 74*4882a593Smuzhiyun unsigned int boundary[MAX_DIES]; 75*4882a593Smuzhiyun unsigned int diesize[MAX_DIES]; 76*4882a593Smuzhiyun unsigned int chipsize; 77*4882a593Smuzhiyun unsigned int device_id; 78*4882a593Smuzhiyun unsigned int version_id; 79*4882a593Smuzhiyun unsigned int technology; 80*4882a593Smuzhiyun unsigned int density_mask; 81*4882a593Smuzhiyun unsigned int options; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun unsigned int erase_shift; 84*4882a593Smuzhiyun unsigned int page_shift; 85*4882a593Smuzhiyun unsigned int ppb_shift; /* Pages per block shift */ 86*4882a593Smuzhiyun unsigned int page_mask; 87*4882a593Smuzhiyun unsigned int writesize; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun unsigned int bufferram_index; 90*4882a593Smuzhiyun struct onenand_bufferram bufferram[MAX_BUFFERRAM]; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun int (*command) (struct mtd_info *mtd, int cmd, loff_t address, 93*4882a593Smuzhiyun size_t len); 94*4882a593Smuzhiyun int (*wait) (struct mtd_info *mtd, int state); 95*4882a593Smuzhiyun int (*bbt_wait) (struct mtd_info *mtd, int state); 96*4882a593Smuzhiyun void (*unlock_all)(struct mtd_info *mtd); 97*4882a593Smuzhiyun int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area, 98*4882a593Smuzhiyun unsigned char *buffer, int offset, size_t count); 99*4882a593Smuzhiyun int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area, 100*4882a593Smuzhiyun const unsigned char *buffer, int offset, 101*4882a593Smuzhiyun size_t count); 102*4882a593Smuzhiyun unsigned short (*read_word) (void __iomem *addr); 103*4882a593Smuzhiyun void (*write_word) (unsigned short value, void __iomem *addr); 104*4882a593Smuzhiyun int (*chip_probe)(struct mtd_info *mtd); 105*4882a593Smuzhiyun void (*mmcontrol) (struct mtd_info *mtd, int sync_read); 106*4882a593Smuzhiyun int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 107*4882a593Smuzhiyun int (*scan_bbt)(struct mtd_info *mtd); 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun unsigned char *main_buf; 110*4882a593Smuzhiyun unsigned char *spare_buf; 111*4882a593Smuzhiyun #ifdef DONT_USE_UBOOT 112*4882a593Smuzhiyun spinlock_t chip_lock; 113*4882a593Smuzhiyun wait_queue_head_t wq; 114*4882a593Smuzhiyun #endif 115*4882a593Smuzhiyun int state; 116*4882a593Smuzhiyun unsigned char *page_buf; 117*4882a593Smuzhiyun unsigned char *oob_buf; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun struct nand_oobinfo *autooob; 120*4882a593Smuzhiyun int subpagesize; 121*4882a593Smuzhiyun struct nand_ecclayout *ecclayout; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun void *bbm; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun void *priv; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* 129*4882a593Smuzhiyun * Helper macros 130*4882a593Smuzhiyun */ 131*4882a593Smuzhiyun #define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) 132*4882a593Smuzhiyun #define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) 133*4882a593Smuzhiyun #define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) 134*4882a593Smuzhiyun #define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1) 135*4882a593Smuzhiyun #define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0) 136*4882a593Smuzhiyun #define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #define FLEXONENAND(this) (this->device_id & DEVICE_IS_FLEXONENAND) 139*4882a593Smuzhiyun #define ONENAND_IS_MLC(this) (this->technology & ONENAND_TECHNOLOGY_IS_MLC) 140*4882a593Smuzhiyun #define ONENAND_IS_DDP(this) \ 141*4882a593Smuzhiyun (this->device_id & ONENAND_DEVICE_IS_DDP) 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun #define ONENAND_IS_4KB_PAGE(this) \ 144*4882a593Smuzhiyun (this->options & ONENAND_HAS_4KB_PAGE) 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #define ONENAND_IS_2PLANE(this) (0) 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* 149*4882a593Smuzhiyun * Options bits 150*4882a593Smuzhiyun */ 151*4882a593Smuzhiyun #define ONENAND_HAS_CONT_LOCK (0x0001) 152*4882a593Smuzhiyun #define ONENAND_HAS_UNLOCK_ALL (0x0002) 153*4882a593Smuzhiyun #define ONENAND_HAS_2PLANE (0x0004) 154*4882a593Smuzhiyun #define ONENAND_HAS_4KB_PAGE (0x0008) 155*4882a593Smuzhiyun #define ONENAND_RUNTIME_BADBLOCK_CHECK (0x0200) 156*4882a593Smuzhiyun #define ONENAND_PAGEBUF_ALLOC (0x1000) 157*4882a593Smuzhiyun #define ONENAND_OOBBUF_ALLOC (0x2000) 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /* 160*4882a593Smuzhiyun * OneNAND Flash Manufacturer ID Codes 161*4882a593Smuzhiyun */ 162*4882a593Smuzhiyun #define ONENAND_MFR_NUMONYX 0x20 163*4882a593Smuzhiyun #define ONENAND_MFR_SAMSUNG 0xec 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /** 166*4882a593Smuzhiyun * struct nand_manufacturers - NAND Flash Manufacturer ID Structure 167*4882a593Smuzhiyun * @param name: Manufacturer name 168*4882a593Smuzhiyun * @param id: manufacturer ID code of device. 169*4882a593Smuzhiyun */ 170*4882a593Smuzhiyun struct onenand_manufacturers { 171*4882a593Smuzhiyun int id; 172*4882a593Smuzhiyun char *name; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 176*4882a593Smuzhiyun struct mtd_oob_ops *ops); 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun unsigned int onenand_block(struct onenand_chip *this, loff_t addr); 179*4882a593Smuzhiyun int flexonenand_region(struct mtd_info *mtd, loff_t addr); 180*4882a593Smuzhiyun #endif /* __LINUX_MTD_ONENAND_H */ 181