1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name> 3*4882a593Smuzhiyun * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 6*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 7*4882a593Smuzhiyun * as published by the Free Software Foundation 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 10*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*4882a593Smuzhiyun * GNU General Public License for more details. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef _LINUX_BITFIELD_H 16*4882a593Smuzhiyun #define _LINUX_BITFIELD_H 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include <linux/bug.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * Bitfield access macros 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * FIELD_{GET,PREP} macros take as first parameter shifted mask 24*4882a593Smuzhiyun * from which they extract the base mask and shift amount. 25*4882a593Smuzhiyun * Mask must be a compilation time constant. 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * Example: 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * #define REG_FIELD_A GENMASK(6, 0) 30*4882a593Smuzhiyun * #define REG_FIELD_B BIT(7) 31*4882a593Smuzhiyun * #define REG_FIELD_C GENMASK(15, 8) 32*4882a593Smuzhiyun * #define REG_FIELD_D GENMASK(31, 16) 33*4882a593Smuzhiyun * 34*4882a593Smuzhiyun * Get: 35*4882a593Smuzhiyun * a = FIELD_GET(REG_FIELD_A, reg); 36*4882a593Smuzhiyun * b = FIELD_GET(REG_FIELD_B, reg); 37*4882a593Smuzhiyun * 38*4882a593Smuzhiyun * Set: 39*4882a593Smuzhiyun * reg = FIELD_PREP(REG_FIELD_A, 1) | 40*4882a593Smuzhiyun * FIELD_PREP(REG_FIELD_B, 0) | 41*4882a593Smuzhiyun * FIELD_PREP(REG_FIELD_C, c) | 42*4882a593Smuzhiyun * FIELD_PREP(REG_FIELD_D, 0x40); 43*4882a593Smuzhiyun * 44*4882a593Smuzhiyun * Modify: 45*4882a593Smuzhiyun * reg &= ~REG_FIELD_C; 46*4882a593Smuzhiyun * reg |= FIELD_PREP(REG_FIELD_C, c); 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define __bf_shf(x) (__builtin_ffsll(x) - 1) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ 52*4882a593Smuzhiyun ({ \ 53*4882a593Smuzhiyun BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ 54*4882a593Smuzhiyun _pfx "mask is not constant"); \ 55*4882a593Smuzhiyun BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero"); \ 56*4882a593Smuzhiyun BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ 57*4882a593Smuzhiyun ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ 58*4882a593Smuzhiyun _pfx "value too large for the field"); \ 59*4882a593Smuzhiyun BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \ 60*4882a593Smuzhiyun _pfx "type of reg too small for mask"); \ 61*4882a593Smuzhiyun __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ 62*4882a593Smuzhiyun (1ULL << __bf_shf(_mask))); \ 63*4882a593Smuzhiyun }) 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /** 66*4882a593Smuzhiyun * FIELD_FIT() - check if value fits in the field 67*4882a593Smuzhiyun * @_mask: shifted mask defining the field's length and position 68*4882a593Smuzhiyun * @_val: value to test against the field 69*4882a593Smuzhiyun * 70*4882a593Smuzhiyun * Return: true if @_val can fit inside @_mask, false if @_val is too big. 71*4882a593Smuzhiyun */ 72*4882a593Smuzhiyun #define FIELD_FIT(_mask, _val) \ 73*4882a593Smuzhiyun ({ \ 74*4882a593Smuzhiyun __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \ 75*4882a593Smuzhiyun !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ 76*4882a593Smuzhiyun }) 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /** 79*4882a593Smuzhiyun * FIELD_PREP() - prepare a bitfield element 80*4882a593Smuzhiyun * @_mask: shifted mask defining the field's length and position 81*4882a593Smuzhiyun * @_val: value to put in the field 82*4882a593Smuzhiyun * 83*4882a593Smuzhiyun * FIELD_PREP() masks and shifts up the value. The result should 84*4882a593Smuzhiyun * be combined with other fields of the bitfield using logical OR. 85*4882a593Smuzhiyun */ 86*4882a593Smuzhiyun #define FIELD_PREP(_mask, _val) \ 87*4882a593Smuzhiyun ({ \ 88*4882a593Smuzhiyun __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ 89*4882a593Smuzhiyun ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ 90*4882a593Smuzhiyun }) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /** 93*4882a593Smuzhiyun * FIELD_GET() - extract a bitfield element 94*4882a593Smuzhiyun * @_mask: shifted mask defining the field's length and position 95*4882a593Smuzhiyun * @_reg: 32bit value of entire bitfield 96*4882a593Smuzhiyun * 97*4882a593Smuzhiyun * FIELD_GET() extracts the field specified by @_mask from the 98*4882a593Smuzhiyun * bitfield passed in as @_reg by masking and shifting it down. 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun #define FIELD_GET(_mask, _reg) \ 101*4882a593Smuzhiyun ({ \ 102*4882a593Smuzhiyun __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ 103*4882a593Smuzhiyun (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ 104*4882a593Smuzhiyun }) 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #endif 107