xref: /OK3568_Linux_fs/u-boot/include/linux/arm-smccc.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2015, Linaro Limited
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun #ifndef __LINUX_ARM_SMCCC_H
7*4882a593Smuzhiyun #define __LINUX_ARM_SMCCC_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun /*
10*4882a593Smuzhiyun  * This file provides common defines for ARM SMC Calling Convention as
11*4882a593Smuzhiyun  * specified in
12*4882a593Smuzhiyun  * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define ARM_SMCCC_STD_CALL		0
16*4882a593Smuzhiyun #define ARM_SMCCC_FAST_CALL		1
17*4882a593Smuzhiyun #define ARM_SMCCC_TYPE_SHIFT		31
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define ARM_SMCCC_SMC_32		0
20*4882a593Smuzhiyun #define ARM_SMCCC_SMC_64		1
21*4882a593Smuzhiyun #define ARM_SMCCC_CALL_CONV_SHIFT	30
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_MASK		0x3F
24*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_SHIFT		24
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define ARM_SMCCC_FUNC_MASK		0xFFFF
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define ARM_SMCCC_IS_FAST_CALL(smc_val)	\
29*4882a593Smuzhiyun 	((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
30*4882a593Smuzhiyun #define ARM_SMCCC_IS_64(smc_val) \
31*4882a593Smuzhiyun 	((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
32*4882a593Smuzhiyun #define ARM_SMCCC_FUNC_NUM(smc_val)	((smc_val) & ARM_SMCCC_FUNC_MASK)
33*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_NUM(smc_val) \
34*4882a593Smuzhiyun 	(((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
37*4882a593Smuzhiyun 	(((type) << ARM_SMCCC_TYPE_SHIFT) | \
38*4882a593Smuzhiyun 	((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
39*4882a593Smuzhiyun 	(((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
40*4882a593Smuzhiyun 	((func_num) & ARM_SMCCC_FUNC_MASK))
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_ARCH		0
43*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_CPU		1
44*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_SIP		2
45*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_OEM		3
46*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_STANDARD	4
47*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_TRUSTED_APP	48
48*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_TRUSTED_APP_END	49
49*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_TRUSTED_OS	50
50*4882a593Smuzhiyun #define ARM_SMCCC_OWNER_TRUSTED_OS_END	63
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define ARM_SMCCC_QUIRK_NONE		0
53*4882a593Smuzhiyun #define ARM_SMCCC_QUIRK_QCOM_A6		1 /* Save/restore register a6 */
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #ifndef __ASSEMBLY__
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #include <linux/linkage.h>
58*4882a593Smuzhiyun #include <linux/types.h>
59*4882a593Smuzhiyun /**
60*4882a593Smuzhiyun  * struct arm_smccc_res - Result from SMC/HVC call
61*4882a593Smuzhiyun  * @a0-a3 result values from registers 0 to 3
62*4882a593Smuzhiyun  */
63*4882a593Smuzhiyun struct arm_smccc_res {
64*4882a593Smuzhiyun 	unsigned long a0;
65*4882a593Smuzhiyun 	unsigned long a1;
66*4882a593Smuzhiyun 	unsigned long a2;
67*4882a593Smuzhiyun 	unsigned long a3;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /**
71*4882a593Smuzhiyun  * struct arm_smccc_quirk - Contains quirk information
72*4882a593Smuzhiyun  * @id: quirk identification
73*4882a593Smuzhiyun  * @state: quirk specific information
74*4882a593Smuzhiyun  * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
75*4882a593Smuzhiyun  */
76*4882a593Smuzhiyun struct arm_smccc_quirk {
77*4882a593Smuzhiyun 	int	id;
78*4882a593Smuzhiyun 	union {
79*4882a593Smuzhiyun 		unsigned long a6;
80*4882a593Smuzhiyun 	} state;
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /**
84*4882a593Smuzhiyun  * __arm_smccc_smc() - make SMC calls
85*4882a593Smuzhiyun  * @a0-a7: arguments passed in registers 0 to 7
86*4882a593Smuzhiyun  * @res: result values from registers 0 to 3
87*4882a593Smuzhiyun  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
88*4882a593Smuzhiyun  *
89*4882a593Smuzhiyun  * This function is used to make SMC calls following SMC Calling Convention.
90*4882a593Smuzhiyun  * The content of the supplied param are copied to registers 0 to 7 prior
91*4882a593Smuzhiyun  * to the SMC instruction. The return values are updated with the content
92*4882a593Smuzhiyun  * from register 0 to 3 on return from the SMC instruction.  An optional
93*4882a593Smuzhiyun  * quirk structure provides vendor specific behavior.
94*4882a593Smuzhiyun  */
95*4882a593Smuzhiyun asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
96*4882a593Smuzhiyun 			unsigned long a2, unsigned long a3, unsigned long a4,
97*4882a593Smuzhiyun 			unsigned long a5, unsigned long a6, unsigned long a7,
98*4882a593Smuzhiyun 			struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun /**
101*4882a593Smuzhiyun  * __arm_smccc_hvc() - make HVC calls
102*4882a593Smuzhiyun  * @a0-a7: arguments passed in registers 0 to 7
103*4882a593Smuzhiyun  * @res: result values from registers 0 to 3
104*4882a593Smuzhiyun  * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
105*4882a593Smuzhiyun  *
106*4882a593Smuzhiyun  * This function is used to make HVC calls following SMC Calling
107*4882a593Smuzhiyun  * Convention.  The content of the supplied param are copied to registers 0
108*4882a593Smuzhiyun  * to 7 prior to the HVC instruction. The return values are updated with
109*4882a593Smuzhiyun  * the content from register 0 to 3 on return from the HVC instruction.  An
110*4882a593Smuzhiyun  * optional quirk structure provides vendor specific behavior.
111*4882a593Smuzhiyun  */
112*4882a593Smuzhiyun asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
113*4882a593Smuzhiyun 			unsigned long a2, unsigned long a3, unsigned long a4,
114*4882a593Smuzhiyun 			unsigned long a5, unsigned long a6, unsigned long a7,
115*4882a593Smuzhiyun 			struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #endif /*__ASSEMBLY__*/
126*4882a593Smuzhiyun #endif /*__LINUX_ARM_SMCCC_H*/
127