1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun struct watchdog_regs { 8*4882a593Smuzhiyun u16 wcr; /* Control */ 9*4882a593Smuzhiyun u16 wsr; /* Service */ 10*4882a593Smuzhiyun u16 wrsr; /* Reset Status */ 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define WCR_WDZST 0x01 14*4882a593Smuzhiyun #define WCR_WDBG 0x02 15*4882a593Smuzhiyun #define WCR_WDE 0x04 16*4882a593Smuzhiyun #define WCR_WDT 0x08 17*4882a593Smuzhiyun #define WCR_SRS 0x10 18*4882a593Smuzhiyun #define WCR_WDA 0x20 19*4882a593Smuzhiyun #define SET_WCR_WT(x) (x << 8) 20*4882a593Smuzhiyun #define WCR_WT_MSK SET_WCR_WT(0xFF) 21