1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifdef CONFIG_ARCH_MX7ULP 9*4882a593Smuzhiyun struct lpuart_fsl_reg32 { 10*4882a593Smuzhiyun u32 verid; 11*4882a593Smuzhiyun u32 param; 12*4882a593Smuzhiyun u32 global; 13*4882a593Smuzhiyun u32 pincfg; 14*4882a593Smuzhiyun u32 baud; 15*4882a593Smuzhiyun u32 stat; 16*4882a593Smuzhiyun u32 ctrl; 17*4882a593Smuzhiyun u32 data; 18*4882a593Smuzhiyun u32 match; 19*4882a593Smuzhiyun u32 modir; 20*4882a593Smuzhiyun u32 fifo; 21*4882a593Smuzhiyun u32 water; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun #else 24*4882a593Smuzhiyun struct lpuart_fsl_reg32 { 25*4882a593Smuzhiyun u32 baud; 26*4882a593Smuzhiyun u32 stat; 27*4882a593Smuzhiyun u32 ctrl; 28*4882a593Smuzhiyun u32 data; 29*4882a593Smuzhiyun u32 match; 30*4882a593Smuzhiyun u32 modir; 31*4882a593Smuzhiyun u32 fifo; 32*4882a593Smuzhiyun u32 water; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct lpuart_fsl { 37*4882a593Smuzhiyun u8 ubdh; 38*4882a593Smuzhiyun u8 ubdl; 39*4882a593Smuzhiyun u8 uc1; 40*4882a593Smuzhiyun u8 uc2; 41*4882a593Smuzhiyun u8 us1; 42*4882a593Smuzhiyun u8 us2; 43*4882a593Smuzhiyun u8 uc3; 44*4882a593Smuzhiyun u8 ud; 45*4882a593Smuzhiyun u8 uma1; 46*4882a593Smuzhiyun u8 uma2; 47*4882a593Smuzhiyun u8 uc4; 48*4882a593Smuzhiyun u8 uc5; 49*4882a593Smuzhiyun u8 ued; 50*4882a593Smuzhiyun u8 umodem; 51*4882a593Smuzhiyun u8 uir; 52*4882a593Smuzhiyun u8 reserved; 53*4882a593Smuzhiyun u8 upfifo; 54*4882a593Smuzhiyun u8 ucfifo; 55*4882a593Smuzhiyun u8 usfifo; 56*4882a593Smuzhiyun u8 utwfifo; 57*4882a593Smuzhiyun u8 utcfifo; 58*4882a593Smuzhiyun u8 urwfifo; 59*4882a593Smuzhiyun u8 urcfifo; 60*4882a593Smuzhiyun u8 rsvd[28]; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Used on i.MX7ULP */ 64*4882a593Smuzhiyun #define LPUART_BAUD_BOTHEDGE_MASK (0x20000) 65*4882a593Smuzhiyun #define LPUART_BAUD_OSR_MASK (0x1F000000) 66*4882a593Smuzhiyun #define LPUART_BAUD_OSR_SHIFT (24) 67*4882a593Smuzhiyun #define LPUART_BAUD_OSR(x) ((((uint32_t)(x)) << 24) & 0x1F000000) 68*4882a593Smuzhiyun #define LPUART_BAUD_SBR_MASK (0x1FFF) 69*4882a593Smuzhiyun #define LPUART_BAUD_SBR_SHIFT (0U) 70*4882a593Smuzhiyun #define LPUART_BAUD_SBR(x) (((uint32_t)(x)) & 0x1FFF) 71*4882a593Smuzhiyun #define LPUART_BAUD_M10_MASK (0x20000000U) 72*4882a593Smuzhiyun #define LPUART_BAUD_SBNS_MASK (0x2000U) 73