1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2013 - 2015 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef _FSL_ERRATA_H
8*4882a593Smuzhiyun #define _FSL_ERRATA_H
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #if defined(CONFIG_PPC)
12*4882a593Smuzhiyun #include <asm/processor.h>
13*4882a593Smuzhiyun #elif defined(CONFIG_ARCH_LS1021A)
14*4882a593Smuzhiyun #include <asm/arch-ls102xa/immap_ls102xa.h>
15*4882a593Smuzhiyun #elif defined(CONFIG_FSL_LAYERSCAPE)
16*4882a593Smuzhiyun #include <asm/arch/soc.h>
17*4882a593Smuzhiyun #endif
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #ifdef CONFIG_SYS_FSL_ERRATUM_A006379
has_erratum_a006379(void)21*4882a593Smuzhiyun static inline bool has_erratum_a006379(void)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun u32 svr = get_svr();
24*4882a593Smuzhiyun if (((SVR_SOC_VER(svr) == SVR_T4240) && SVR_MAJ(svr) <= 1) ||
25*4882a593Smuzhiyun ((SVR_SOC_VER(svr) == SVR_T4160) && SVR_MAJ(svr) <= 1) ||
26*4882a593Smuzhiyun ((SVR_SOC_VER(svr) == SVR_T4080) && SVR_MAJ(svr) <= 1) ||
27*4882a593Smuzhiyun ((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2) ||
28*4882a593Smuzhiyun ((SVR_SOC_VER(svr) == SVR_B4420) && SVR_MAJ(svr) <= 2) ||
29*4882a593Smuzhiyun ((SVR_SOC_VER(svr) == SVR_T2080) && SVR_MAJ(svr) <= 1) ||
30*4882a593Smuzhiyun ((SVR_SOC_VER(svr) == SVR_T2081) && SVR_MAJ(svr) <= 1))
31*4882a593Smuzhiyun return true;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return false;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun #endif
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #ifdef CONFIG_SYS_FSL_ERRATUM_A007186
has_erratum_a007186(void)38*4882a593Smuzhiyun static inline bool has_erratum_a007186(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun u32 svr = get_svr();
41*4882a593Smuzhiyun u32 soc = SVR_SOC_VER(svr);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun switch (soc) {
44*4882a593Smuzhiyun case SVR_T4240:
45*4882a593Smuzhiyun return IS_SVR_REV(svr, 2, 0);
46*4882a593Smuzhiyun case SVR_T4160:
47*4882a593Smuzhiyun return IS_SVR_REV(svr, 2, 0);
48*4882a593Smuzhiyun case SVR_B4860:
49*4882a593Smuzhiyun return IS_SVR_REV(svr, 2, 0);
50*4882a593Smuzhiyun case SVR_B4420:
51*4882a593Smuzhiyun return IS_SVR_REV(svr, 2, 0);
52*4882a593Smuzhiyun case SVR_T2081:
53*4882a593Smuzhiyun case SVR_T2080:
54*4882a593Smuzhiyun return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return false;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #ifdef CONFIG_SYS_FSL_ERRATUM_A008378
has_erratum_a008378(void)62*4882a593Smuzhiyun static inline bool has_erratum_a008378(void)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun u32 svr = get_svr();
65*4882a593Smuzhiyun u32 soc = SVR_SOC_VER(svr);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun switch (soc) {
69*4882a593Smuzhiyun #ifdef CONFIG_ARCH_LS1021A
70*4882a593Smuzhiyun case SOC_VER_LS1020:
71*4882a593Smuzhiyun case SOC_VER_LS1021:
72*4882a593Smuzhiyun case SOC_VER_LS1022:
73*4882a593Smuzhiyun case SOC_VER_SLS1020:
74*4882a593Smuzhiyun return IS_SVR_REV(svr, 1, 0);
75*4882a593Smuzhiyun #endif
76*4882a593Smuzhiyun #ifdef CONFIG_PPC
77*4882a593Smuzhiyun case SVR_T1023:
78*4882a593Smuzhiyun case SVR_T1024:
79*4882a593Smuzhiyun return IS_SVR_REV(svr, 1, 0);
80*4882a593Smuzhiyun case SVR_T1020:
81*4882a593Smuzhiyun case SVR_T1022:
82*4882a593Smuzhiyun case SVR_T1040:
83*4882a593Smuzhiyun case SVR_T1042:
84*4882a593Smuzhiyun return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
85*4882a593Smuzhiyun #endif
86*4882a593Smuzhiyun default:
87*4882a593Smuzhiyun return false;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #endif /* _FSL_ERRATA_H */
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