1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This header provides constants for binding intel,x86-pinctrl. 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef _DT_BINDINGS_GPIO_X86_GPIO_H 6*4882a593Smuzhiyun #define _DT_BINDINGS_GPIO_X86_GPIO_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define GPIO_MODE_NATIVE 0 11*4882a593Smuzhiyun #define GPIO_MODE_GPIO 1 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define GPIO_MODE_FUNC0 0 14*4882a593Smuzhiyun #define GPIO_MODE_FUNC1 1 15*4882a593Smuzhiyun #define GPIO_MODE_FUNC2 2 16*4882a593Smuzhiyun #define GPIO_MODE_FUNC3 3 17*4882a593Smuzhiyun #define GPIO_MODE_FUNC4 4 18*4882a593Smuzhiyun #define GPIO_MODE_FUNC5 5 19*4882a593Smuzhiyun #define GPIO_MODE_FUNC6 6 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define PIN_INPUT 0 22*4882a593Smuzhiyun #define PIN_OUTPUT 1 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define PIN_INPUT_NOPULL 0 25*4882a593Smuzhiyun #define PIN_INPUT_PULLUP 1 26*4882a593Smuzhiyun #define PIN_INPUT_PULLDOWN 2 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define PULL_STR_2K 0 29*4882a593Smuzhiyun #define PULL_STR_20K 2 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define ROUTE_SCI 0 32*4882a593Smuzhiyun #define ROUTE_SMI 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define OWNER_ACPI 0 35*4882a593Smuzhiyun #define OWNER_GPIO 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define PIRQ_APIC_MASK 0 38*4882a593Smuzhiyun #define PIRQ_APIC_ROUTE 1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define TRIGGER_EDGE 0 41*4882a593Smuzhiyun #define TRIGGER_LEVEL 1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #endif 44