1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015 3*4882a593Smuzhiyun * Texas Instruments Incorporated, <www.ti.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _DMA_H_ 9*4882a593Smuzhiyun #define _DMA_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * enum dma_direction - dma transfer direction indicator 13*4882a593Smuzhiyun * @DMA_MEM_TO_MEM: Memcpy mode 14*4882a593Smuzhiyun * @DMA_MEM_TO_DEV: From Memory to Device 15*4882a593Smuzhiyun * @DMA_DEV_TO_MEM: From Device to Memory 16*4882a593Smuzhiyun * @DMA_DEV_TO_DEV: From Device to Device 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun enum dma_direction { 19*4882a593Smuzhiyun DMA_MEM_TO_MEM, 20*4882a593Smuzhiyun DMA_MEM_TO_DEV, 21*4882a593Smuzhiyun DMA_DEV_TO_MEM, 22*4882a593Smuzhiyun DMA_DEV_TO_DEV, 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define DMA_SUPPORTS_MEM_TO_MEM BIT(0) 26*4882a593Smuzhiyun #define DMA_SUPPORTS_MEM_TO_DEV BIT(1) 27*4882a593Smuzhiyun #define DMA_SUPPORTS_DEV_TO_MEM BIT(2) 28*4882a593Smuzhiyun #define DMA_SUPPORTS_DEV_TO_DEV BIT(3) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* 31*4882a593Smuzhiyun * struct dma_ops - Driver model DMA operations 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * The uclass interface is implemented by all DMA devices which use 34*4882a593Smuzhiyun * driver model. 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun struct dma_ops { 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * Get the current timer count 39*4882a593Smuzhiyun * 40*4882a593Smuzhiyun * @dev: The DMA device 41*4882a593Smuzhiyun * @direction: direction of data transfer should be one from 42*4882a593Smuzhiyun enum dma_direction 43*4882a593Smuzhiyun * @dst: Destination pointer 44*4882a593Smuzhiyun * @src: Source pointer 45*4882a593Smuzhiyun * @len: Length of the data to be copied. 46*4882a593Smuzhiyun * @return: 0 if OK, -ve on error 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun int (*transfer)(struct udevice *dev, int direction, void *dst, 49*4882a593Smuzhiyun void *src, size_t len); 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * struct dma_dev_priv - information about a device used by the uclass 54*4882a593Smuzhiyun * 55*4882a593Smuzhiyun * @supported: mode of transfers that DMA can support, should be 56*4882a593Smuzhiyun * one/multiple of DMA_SUPPORTS_* 57*4882a593Smuzhiyun */ 58*4882a593Smuzhiyun struct dma_dev_priv { 59*4882a593Smuzhiyun u32 supported; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* 63*4882a593Smuzhiyun * dma_get_device - get a DMA device which supports transfer 64*4882a593Smuzhiyun * type of transfer_type 65*4882a593Smuzhiyun * 66*4882a593Smuzhiyun * @transfer_type - transfer type should be one/multiple of 67*4882a593Smuzhiyun * DMA_SUPPORTS_* 68*4882a593Smuzhiyun * @devp - udevice pointer to return the found device 69*4882a593Smuzhiyun * @return - will return on success and devp will hold the 70*4882a593Smuzhiyun * pointer to the device 71*4882a593Smuzhiyun */ 72*4882a593Smuzhiyun int dma_get_device(u32 transfer_type, struct udevice **devp); 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* 75*4882a593Smuzhiyun * dma_memcpy - try to use DMA to do a mem copy which will be 76*4882a593Smuzhiyun * much faster than CPU mem copy 77*4882a593Smuzhiyun * 78*4882a593Smuzhiyun * @dst - destination pointer 79*4882a593Smuzhiyun * @src - souce pointer 80*4882a593Smuzhiyun * @len - data length to be copied 81*4882a593Smuzhiyun * @return - on successful transfer returns no of bytes 82*4882a593Smuzhiyun transferred and on failure return error code. 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun int dma_memcpy(void *dst, void *src, size_t len); 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #endif /* _DMA_H_ */ 87