xref: /OK3568_Linux_fs/u-boot/include/dm/uclass-id.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2013 Google, Inc
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * (C) Copyright 2012
5*4882a593Smuzhiyun  * Pavel Herrmann <morpheus.ibis@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef _DM_UCLASS_ID_H
11*4882a593Smuzhiyun #define _DM_UCLASS_ID_H
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /* TODO(sjg@chromium.org): this could be compile-time generated */
14*4882a593Smuzhiyun enum uclass_id {
15*4882a593Smuzhiyun 	/* These are used internally by driver model */
16*4882a593Smuzhiyun 	UCLASS_ROOT = 0,
17*4882a593Smuzhiyun 	UCLASS_DEMO,
18*4882a593Smuzhiyun 	UCLASS_TEST,
19*4882a593Smuzhiyun 	UCLASS_TEST_FDT,
20*4882a593Smuzhiyun 	UCLASS_TEST_BUS,
21*4882a593Smuzhiyun 	UCLASS_TEST_PROBE,
22*4882a593Smuzhiyun 	UCLASS_SPI_EMUL,	/* sandbox SPI device emulator */
23*4882a593Smuzhiyun 	UCLASS_I2C_EMUL,	/* sandbox I2C device emulator */
24*4882a593Smuzhiyun 	UCLASS_PCI_EMUL,	/* sandbox PCI device emulator */
25*4882a593Smuzhiyun 	UCLASS_USB_EMUL,	/* sandbox USB bus device emulator */
26*4882a593Smuzhiyun 	UCLASS_SIMPLE_BUS,	/* bus with child devices */
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	/* U-Boot uclasses start here - in alphabetical order */
29*4882a593Smuzhiyun 	UCLASS_ADC,		/* Analog-to-digital converter */
30*4882a593Smuzhiyun 	UCLASS_AHCI,		/* SATA disk controller */
31*4882a593Smuzhiyun 	UCLASS_BLK,		/* Block device */
32*4882a593Smuzhiyun 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
33*4882a593Smuzhiyun 	UCLASS_CPU,		/* CPU, typically part of an SoC */
34*4882a593Smuzhiyun 	UCLASS_AMP,		/* Asymmetric Multi-Processing */
35*4882a593Smuzhiyun 	UCLASS_CODEC,		/* audio codec */
36*4882a593Smuzhiyun 	UCLASS_CROS_EC,		/* Chrome OS EC */
37*4882a593Smuzhiyun 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
38*4882a593Smuzhiyun 	UCLASS_DMA,		/* Direct Memory Access */
39*4882a593Smuzhiyun 	UCLASS_ETH,		/* Ethernet device */
40*4882a593Smuzhiyun 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
41*4882a593Smuzhiyun 	UCLASS_FIRMWARE,	/* Firmware */
42*4882a593Smuzhiyun 	UCLASS_I2C,		/* I2C bus */
43*4882a593Smuzhiyun 	UCLASS_I2C_EEPROM,	/* I2C EEPROM device */
44*4882a593Smuzhiyun 	UCLASS_I2C_GENERIC,	/* Generic I2C device */
45*4882a593Smuzhiyun 	UCLASS_I2C_MUX,		/* I2C multiplexer */
46*4882a593Smuzhiyun 	UCLASS_I2S,		/* I2S bus */
47*4882a593Smuzhiyun 	UCLASS_IDE,		/* IDE device */
48*4882a593Smuzhiyun 	UCLASS_IRQ,		/* Interrupt controller */
49*4882a593Smuzhiyun 	UCLASS_KEYBOARD,	/* Keyboard input device */
50*4882a593Smuzhiyun 	UCLASS_LED,		/* Light-emitting diode (LED) */
51*4882a593Smuzhiyun 	UCLASS_LPC,		/* x86 'low pin count' interface */
52*4882a593Smuzhiyun 	UCLASS_MAILBOX,		/* Mailbox controller */
53*4882a593Smuzhiyun 	UCLASS_MASS_STORAGE,	/* Mass storage device */
54*4882a593Smuzhiyun 	UCLASS_MISC,		/* Miscellaneous device */
55*4882a593Smuzhiyun 	UCLASS_MMC,		/* SD / MMC card or chip */
56*4882a593Smuzhiyun 	UCLASS_MOD_EXP,		/* RSA Mod Exp device */
57*4882a593Smuzhiyun 	UCLASS_MTD,		/* Memory Technology Device (MTD) device */
58*4882a593Smuzhiyun 	UCLASS_NOP,		/* No-op devices */
59*4882a593Smuzhiyun 	UCLASS_NORTHBRIDGE,	/* Intel Northbridge / SDRAM controller */
60*4882a593Smuzhiyun 	UCLASS_NVME,		/* NVM Express device */
61*4882a593Smuzhiyun 	UCLASS_PANEL,		/* Display panel, such as an LCD */
62*4882a593Smuzhiyun 	UCLASS_PANEL_BACKLIGHT,	/* Backlight controller for panel */
63*4882a593Smuzhiyun 	UCLASS_PCH,		/* x86 platform controller hub */
64*4882a593Smuzhiyun 	UCLASS_PCI,		/* PCI bus */
65*4882a593Smuzhiyun 	UCLASS_PCI_GENERIC,	/* Generic PCI bus device */
66*4882a593Smuzhiyun 	UCLASS_PHY,		/* Physical Layer (PHY) device */
67*4882a593Smuzhiyun 	UCLASS_PINCONFIG,	/* Pin configuration node device */
68*4882a593Smuzhiyun 	UCLASS_PINCTRL,		/* Pinctrl (pin muxing/configuration) device */
69*4882a593Smuzhiyun 	UCLASS_PMIC,		/* PMIC I/O device */
70*4882a593Smuzhiyun 	UCLASS_PWM,		/* Pulse-width modulator */
71*4882a593Smuzhiyun 	UCLASS_POWER_DOMAIN,	/* (SoC) Power domains */
72*4882a593Smuzhiyun 	UCLASS_PWRSEQ,		/* Power sequence device */
73*4882a593Smuzhiyun 	UCLASS_RAM,		/* RAM controller */
74*4882a593Smuzhiyun 	UCLASS_REGULATOR,	/* Regulator device */
75*4882a593Smuzhiyun 	UCLASS_REMOTEPROC,	/* Remote Processor device */
76*4882a593Smuzhiyun 	UCLASS_RESET,		/* Reset controller device */
77*4882a593Smuzhiyun 	UCLASS_RKNAND,		/* Rockchip nand device with ftl */
78*4882a593Smuzhiyun 	UCLASS_RAMDISK,		/* Virtual ram disk */
79*4882a593Smuzhiyun 	UCLASS_RTC,		/* Real time clock device */
80*4882a593Smuzhiyun 	UCLASS_SCMI_AGENT,	/* Interface with an SCMI server */
81*4882a593Smuzhiyun 	UCLASS_SCSI,		/* SCSI device */
82*4882a593Smuzhiyun 	UCLASS_SERIAL,		/* Serial UART */
83*4882a593Smuzhiyun 	UCLASS_SPI,		/* SPI bus */
84*4882a593Smuzhiyun 	UCLASS_SPMI,		/* System Power Management Interface bus */
85*4882a593Smuzhiyun 	UCLASS_SPI_FLASH,	/* SPI flash */
86*4882a593Smuzhiyun 	UCLASS_SPI_GENERIC,	/* Generic SPI flash target */
87*4882a593Smuzhiyun 	UCLASS_SYSCON,		/* System configuration device */
88*4882a593Smuzhiyun 	UCLASS_SYSRESET,	/* System reset device */
89*4882a593Smuzhiyun 	UCLASS_THERMAL,		/* Thermal sensor */
90*4882a593Smuzhiyun 	UCLASS_TIMER,		/* Timer device */
91*4882a593Smuzhiyun 	UCLASS_TPM,		/* Trusted Platform Module TIS interface */
92*4882a593Smuzhiyun 	UCLASS_UFS,             /* Universal Flash Storage */
93*4882a593Smuzhiyun 	UCLASS_USB,		/* USB bus */
94*4882a593Smuzhiyun 	UCLASS_USB_DEV_GENERIC,	/* USB generic device */
95*4882a593Smuzhiyun 	UCLASS_USB_HUB,		/* USB hub */
96*4882a593Smuzhiyun 	UCLASS_USB_GADGET_GENERIC,	/* USB generic device */
97*4882a593Smuzhiyun 	UCLASS_VIDEO,		/* Video or LCD device */
98*4882a593Smuzhiyun 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
99*4882a593Smuzhiyun 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
100*4882a593Smuzhiyun 	UCLASS_VIDEO_CRTC,	/* Display Controller */
101*4882a593Smuzhiyun 	UCLASS_WDT,		/* Watchdot Timer driver */
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	UCLASS_FG,		/* Fuel gauge */
104*4882a593Smuzhiyun 	UCLASS_KEY,		/* Key */
105*4882a593Smuzhiyun 	UCLASS_RC,		/* Remote Controller */
106*4882a593Smuzhiyun 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
107*4882a593Smuzhiyun 	UCLASS_DVFS,		/* DVFS policy */
108*4882a593Smuzhiyun 	UCLASS_IO_DOMAIN,	/* IO domain */
109*4882a593Smuzhiyun 	UCLASS_CRYPTO,		/* Crypto */
110*4882a593Smuzhiyun 	UCLASS_ETH_PHY,		/* Ethernet PHY device */
111*4882a593Smuzhiyun 	UCLASS_MDIO,		/* MDIO bus */
112*4882a593Smuzhiyun 	UCLASS_EBC,		/* EBC Controller for eink screen */
113*4882a593Smuzhiyun 	UCLASS_EINK_DISPLAY,	/* EINK screen display driver */
114*4882a593Smuzhiyun 	UCLASS_RNG,		/* Random Number Generator */
115*4882a593Smuzhiyun 	UCLASS_DMC,		/* Dynamic Memory Interface */
116*4882a593Smuzhiyun 	UCLASS_PD,		/* power delivery */
117*4882a593Smuzhiyun 	UCLASS_COUNT,
118*4882a593Smuzhiyun 	UCLASS_INVALID = -1,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #endif
122