1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * CPSW Ethernet Switch Driver 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or 7*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 8*4882a593Smuzhiyun * published by the Free Software Foundation version 2. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11*4882a593Smuzhiyun * kind, whether express or implied; without even the implied warranty 12*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13*4882a593Smuzhiyun * GNU General Public License for more details. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifndef _CPSW_H_ 17*4882a593Smuzhiyun #define _CPSW_H_ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun struct cpsw_slave_data { 20*4882a593Smuzhiyun u32 slave_reg_ofs; 21*4882a593Smuzhiyun u32 sliver_reg_ofs; 22*4882a593Smuzhiyun int phy_addr; 23*4882a593Smuzhiyun int phy_if; 24*4882a593Smuzhiyun int phy_of_handle; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun enum { 28*4882a593Smuzhiyun CPSW_CTRL_VERSION_1 = 0, 29*4882a593Smuzhiyun CPSW_CTRL_VERSION_2 /* am33xx like devices */ 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun struct cpsw_platform_data { 33*4882a593Smuzhiyun u32 mdio_base; 34*4882a593Smuzhiyun u32 cpsw_base; 35*4882a593Smuzhiyun u32 mac_id; 36*4882a593Smuzhiyun u32 gmii_sel; 37*4882a593Smuzhiyun int mdio_div; 38*4882a593Smuzhiyun int channels; /* number of cpdma channels (symmetric) */ 39*4882a593Smuzhiyun u32 cpdma_reg_ofs; /* cpdma register offset */ 40*4882a593Smuzhiyun int slaves; /* number of slave cpgmac ports */ 41*4882a593Smuzhiyun u32 ale_reg_ofs; /* address lookup engine reg offset */ 42*4882a593Smuzhiyun int ale_entries; /* ale table size */ 43*4882a593Smuzhiyun u32 host_port_reg_ofs; /* cpdma host port registers */ 44*4882a593Smuzhiyun u32 hw_stats_reg_ofs; /* cpsw hw stats counters */ 45*4882a593Smuzhiyun u32 bd_ram_ofs; /* Buffer Descriptor RAM offset */ 46*4882a593Smuzhiyun u32 mac_control; 47*4882a593Smuzhiyun struct cpsw_slave_data *slave_data; 48*4882a593Smuzhiyun void (*control)(int enabled); 49*4882a593Smuzhiyun u32 host_port_num; 50*4882a593Smuzhiyun u32 active_slave; 51*4882a593Smuzhiyun bool rmii_clock_external; 52*4882a593Smuzhiyun u8 version; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun int cpsw_register(struct cpsw_platform_data *data); 56*4882a593Smuzhiyun int ti_cm_get_macid(struct udevice *dev, int slave, u8 *mac_addr); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #endif /* _CPSW_H_ */ 59