1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2012 Xilinx 3*4882a593Smuzhiyun * (C) Copyright 2014 Digilent Inc. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Configuration for Zynq Development Board - ZYBO 6*4882a593Smuzhiyun * See zynq-common.h for Zynq common configs 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __CONFIG_ZYNQ_ZYBO_H 12*4882a593Smuzhiyun #define __CONFIG_ZYNQ_ZYBO_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_ZYNQ_I2C0 15*4882a593Smuzhiyun #define CONFIG_ZYNQ_I2C1 16*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 17*4882a593Smuzhiyun #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50 18*4882a593Smuzhiyun #define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA 19*4882a593Smuzhiyun #define CONFIG_DISPLAY 20*4882a593Smuzhiyun #define CONFIG_I2C_EDID 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #include <configs/zynq-common.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #endif /* __CONFIG_ZYNQ_ZYBO_H */ 25