1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (c) 2011 Graf-Syteco, Matthias Weisser 3*4882a593Smuzhiyun * <weisserm@arcor.de> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Configuation settings for the zmx25 board 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __CONFIG_H 11*4882a593Smuzhiyun #define __CONFIG_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define CONFIG_MX25 16*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0xA0000000 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_RATE 32768 19*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_COUNTER \ 20*4882a593Smuzhiyun (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define CONFIG_MACH_TYPE MACH_TYPE_ZMX25 23*4882a593Smuzhiyun /* 24*4882a593Smuzhiyun * Environment settings 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 27*4882a593Smuzhiyun "gs_fast_boot=setenv bootdelay 5\0" \ 28*4882a593Smuzhiyun "gs_slow_boot=setenv bootdelay 10\0" \ 29*4882a593Smuzhiyun "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \ 30*4882a593Smuzhiyun "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \ 31*4882a593Smuzhiyun "bootm 0x81000000; bootelf 0x81000000\0" 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 35*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * Hardware drivers 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * GPIO 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun #define CONFIG_MXC_GPIO 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* 47*4882a593Smuzhiyun * Serial 48*4882a593Smuzhiyun */ 49*4882a593Smuzhiyun #define CONFIG_MXC_UART 50*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART2_BASE 51*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 /* use UART2 for console */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* 54*4882a593Smuzhiyun * Ethernet 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun #define CONFIG_FEC_MXC 57*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x00 58*4882a593Smuzhiyun #define CONFIG_MII 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* 61*4882a593Smuzhiyun * BOOTP options 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTFILESIZE 64*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTPATH 65*4882a593Smuzhiyun #define CONFIG_BOOTP_GATEWAY 66*4882a593Smuzhiyun #define CONFIG_BOOTP_HOSTNAME 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* 69*4882a593Smuzhiyun * Command line configuration. 70*4882a593Smuzhiyun */ 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* 73*4882a593Smuzhiyun * Additional command 74*4882a593Smuzhiyun */ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* 77*4882a593Smuzhiyun * USB 78*4882a593Smuzhiyun */ 79*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB 80*4882a593Smuzhiyun #define CONFIG_USB_EHCI_MXC 81*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 82*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORT 1 83*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL 84*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN) 85*4882a593Smuzhiyun #define CONFIG_EHCI_IS_TDI 86*4882a593Smuzhiyun #define CONFIG_SUPPORT_VFAT 87*4882a593Smuzhiyun #endif /* CONFIG_CMD_USB */ 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* SDRAM */ 90*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 91*4882a593Smuzhiyun #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ 92*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 95*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun * FLASH and environment organization 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_BASE 0xA0000000 101*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_BANKS 1 102*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_SECT 256 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) 105*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE (128 * 1024) 106*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (128 * 1024) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* 109*4882a593Smuzhiyun * CFI FLASH driver setup 110*4882a593Smuzhiyun */ 111*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_CFI 112*4882a593Smuzhiyun #define CONFIG_FLASH_CFI_DRIVER 113*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) 118*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 121*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #define CONFIG_PREBOOT "" 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /* 127*4882a593Smuzhiyun * Size of malloc() pool 128*4882a593Smuzhiyun */ 129*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #endif /* __CONFIG_H */ 132