1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the CCV xPress board 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef __XPRESS_CONFIG_H 9*4882a593Smuzhiyun #define __XPRESS_CONFIG_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include "mx6_common.h" 12*4882a593Smuzhiyun #include <asm/mach-imx/gpio.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* SPL options */ 15*4882a593Smuzhiyun #include "imx6_spl.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* Size of malloc() pool */ 18*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (16 << 20) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define CONFIG_MXC_UART 21*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* MMC Configs */ 24*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 25*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* I2C configs */ 28*4882a593Smuzhiyun #define CONFIG_SYS_I2C 29*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 30*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 31*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 32*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ 33*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* Miscellaneous configurable options */ 36*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80000000 37*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 40*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* Physical Memory Map */ 45*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 46*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 47*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE (128 << 20) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 50*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 51*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 54*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 55*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 56*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* Environment is in stored in the eMMC boot partition */ 59*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (16 << 10) 60*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (512 << 10) 61*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 62*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */ 63*4882a593Smuzhiyun #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* USB Configs */ 66*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 67*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 68*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS 0 69*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define CONFIG_FEC_MXC 72*4882a593Smuzhiyun #define CONFIG_MII 73*4882a593Smuzhiyun #define CONFIG_FEC_ENET_DEV 0 74*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_BASE_ADDR 75*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x0 76*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 77*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC" 78*4882a593Smuzhiyun #define CONFIG_PHY_SMSC 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define CONFIG_UBOOT_SECTOR_START 0x2 85*4882a593Smuzhiyun #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 88*4882a593Smuzhiyun "script=boot.scr\0" \ 89*4882a593Smuzhiyun "image=zImage\0" \ 90*4882a593Smuzhiyun "console=ttymxc0\0" \ 91*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 92*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 93*4882a593Smuzhiyun "fdt_file=undefined\0" \ 94*4882a593Smuzhiyun "fdt_addr=0x83000000\0" \ 95*4882a593Smuzhiyun "boot_fdt=try\0" \ 96*4882a593Smuzhiyun "ip_dyn=yes\0" \ 97*4882a593Smuzhiyun "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 98*4882a593Smuzhiyun "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 99*4882a593Smuzhiyun "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 100*4882a593Smuzhiyun "mmcautodetect=yes\0" \ 101*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console},${baudrate} " \ 102*4882a593Smuzhiyun "root=${mmcroot}\0" \ 103*4882a593Smuzhiyun "loadbootscript=" \ 104*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 105*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 106*4882a593Smuzhiyun "source\0" \ 107*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 108*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 109*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 110*4882a593Smuzhiyun "run mmcargs; " \ 111*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 112*4882a593Smuzhiyun "if run loadfdt; then " \ 113*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 114*4882a593Smuzhiyun "else " \ 115*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 116*4882a593Smuzhiyun "bootz; " \ 117*4882a593Smuzhiyun "else " \ 118*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 119*4882a593Smuzhiyun "fi; " \ 120*4882a593Smuzhiyun "fi; " \ 121*4882a593Smuzhiyun "else " \ 122*4882a593Smuzhiyun "bootz; " \ 123*4882a593Smuzhiyun "fi;\0" \ 124*4882a593Smuzhiyun "uboot=ccv/u-boot.imx\0" \ 125*4882a593Smuzhiyun "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \ 126*4882a593Smuzhiyun "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \ 127*4882a593Smuzhiyun "update_uboot=if tftp ${uboot}; then " \ 128*4882a593Smuzhiyun "if itest ${filesize} > 0; then " \ 129*4882a593Smuzhiyun "mmc dev 0 1;" \ 130*4882a593Smuzhiyun "setexpr blkc ${filesize} / 0x200;" \ 131*4882a593Smuzhiyun "setexpr blkc ${blkc} + 1;" \ 132*4882a593Smuzhiyun "if itest ${blkc} <= ${uboot_size}; then " \ 133*4882a593Smuzhiyun "mmc write ${loadaddr} ${uboot_start} " \ 134*4882a593Smuzhiyun "${blkc};" \ 135*4882a593Smuzhiyun "fi;" \ 136*4882a593Smuzhiyun "fi; fi;" \ 137*4882a593Smuzhiyun "setenv filesize; setenv blkc\0" \ 138*4882a593Smuzhiyun "update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0" 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun #endif /* __XPRESS_CONFIG_H */ 141