1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 samtec automotive software & electronics gmbh 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Samtec VIN|ING 2000 board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __CONFIG_H 10*4882a593Smuzhiyun #define __CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include "mx6_common.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifdef CONFIG_SPL 15*4882a593Smuzhiyun #include "imx6_spl.h" 16*4882a593Smuzhiyun #endif 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Size of malloc() pool */ 19*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_MXC_UART 22*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define BOOT_TARGET_DEVICES(func) \ 25*4882a593Smuzhiyun func(MMC, mmc, 0) \ 26*4882a593Smuzhiyun func(MMC, mmc, 1) \ 27*4882a593Smuzhiyun func(USB, usb, 0) \ 28*4882a593Smuzhiyun func(PXE, pxe, na) \ 29*4882a593Smuzhiyun func(DHCP, dhcp, na) 30*4882a593Smuzhiyun #include <config_distro_bootcmd.h> 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Miscellaneous configurable options */ 33*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80000000 34*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* Physical Memory Map */ 37*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 38*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 41*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 42*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 45*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 46*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 47*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* MMC Configuration */ 50*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* I2C Configs */ 53*4882a593Smuzhiyun #define CONFIG_SYS_I2C 54*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 55*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 56*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 57*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* PMIC */ 60*4882a593Smuzhiyun #define CONFIG_POWER 61*4882a593Smuzhiyun #define CONFIG_POWER_I2C 62*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100 63*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* Network */ 66*4882a593Smuzhiyun #define CONFIG_FEC_MXC 67*4882a593Smuzhiyun #define CONFIG_MII 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_BASE_ADDR 70*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x0 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 73*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC" 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define CONFIG_PHY_ATHEROS 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB 78*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 79*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 80*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS 0 81*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 82*4882a593Smuzhiyun #endif 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #ifdef CONFIG_CMD_PCI 85*4882a593Smuzhiyun #define CONFIG_PCI_SCAN_SHOW 86*4882a593Smuzhiyun #define CONFIG_PCIE_IMX 87*4882a593Smuzhiyun #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) 88*4882a593Smuzhiyun #endif 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define CONFIG_PWM_IMX 93*4882a593Smuzhiyun #define CONFIG_IMX6_PWM_PER_CLK 66000000 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 96*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (8 * SZ_64K) 97*4882a593Smuzhiyun #define CONFIG_ENV_SIZE SZ_8K 98*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET_REDUND (9 * SZ_64K) 99*4882a593Smuzhiyun #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_MMC 102*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT 103*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_RPMB 104*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC4 eMMC */ 105*4882a593Smuzhiyun /* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */ 106*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 1 /* boot0 */ 107*4882a593Smuzhiyun #endif 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #endif /* __CONFIG_H */ 110