1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * USB armory MkI board configuration settings 3*4882a593Smuzhiyun * http://inversepath.com/usbarmory 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015, Inverse Path 6*4882a593Smuzhiyun * Andrej Rosano <andrej@inversepath.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier:|____GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __CONFIG_H 12*4882a593Smuzhiyun #define __CONFIG_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK 15*4882a593Smuzhiyun #define CONFIG_MXC_GPIO 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #include <config_distro_defaults.h> 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* U-Boot environment */ 22*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 23*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 24*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* U-Boot general configurations */ 27*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 512 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* UART */ 30*4882a593Smuzhiyun #define CONFIG_MXC_UART 31*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 32*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* SD/MMC */ 35*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 36*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 37*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM 1 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* USB */ 40*4882a593Smuzhiyun #define CONFIG_USB_EHCI_MX5 41*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORT 1 42*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 43*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS 0 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* I2C */ 46*4882a593Smuzhiyun #define CONFIG_SYS_I2C 47*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 48*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 49*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Fuse */ 52*4882a593Smuzhiyun #define CONFIG_FSL_IIM 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* U-Boot memory offsets */ 55*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x72000000 56*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x77800000 57*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Linux boot */ 60*4882a593Smuzhiyun #define CONFIG_HOSTNAME usbarmory 61*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 62*4882a593Smuzhiyun "run distro_bootcmd; " \ 63*4882a593Smuzhiyun "setenv bootargs console=${console} ${bootargs_default}; " \ 64*4882a593Smuzhiyun "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ 65*4882a593Smuzhiyun "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ 66*4882a593Smuzhiyun "bootz ${kernel_addr_r} - ${fdt_addr_r}" 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #include <config_distro_bootcmd.h> 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define MEM_LAYOUT_ENV_SETTINGS \ 73*4882a593Smuzhiyun "kernel_addr_r=0x70800000\0" \ 74*4882a593Smuzhiyun "fdt_addr_r=0x71000000\0" \ 75*4882a593Smuzhiyun "scriptaddr=0x70800000\0" \ 76*4882a593Smuzhiyun "pxefile_addr_r=0x70800000\0" \ 77*4882a593Smuzhiyun "ramdisk_addr_r=0x73000000\0" 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 80*4882a593Smuzhiyun MEM_LAYOUT_ENV_SETTINGS \ 81*4882a593Smuzhiyun "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ 82*4882a593Smuzhiyun "fdtfile=imx53-usbarmory.dtb\0" \ 83*4882a593Smuzhiyun "console=ttymxc0,115200\0" \ 84*4882a593Smuzhiyun BOOTENV 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #ifndef CONFIG_CMDLINE 87*4882a593Smuzhiyun #define USBARMORY_FIT_PATH "/boot/usbarmory.itb" 88*4882a593Smuzhiyun #define USBARMORY_FIT_ADDR "0x70800000" 89*4882a593Smuzhiyun #endif 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* Physical Memory Map */ 92*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 93*4882a593Smuzhiyun #define PHYS_SDRAM CSD0_BASE_ADDR 94*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE (gd->ram_size) 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 97*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 98*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 101*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 102*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 103*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x70000000 106*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x90000000 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #endif /* __CONFIG_H */ 111