xref: /OK3568_Linux_fs/u-boot/include/configs/trats2.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2013 Samsung Electronics
3*4882a593Smuzhiyun  * Sanghee Kim <sh0130.kim@samsung.com>
4*4882a593Smuzhiyun  * Piotr Wilczek <p.wilczek@samsung.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __CONFIG_TRATS2_H
12*4882a593Smuzhiyun #define __CONFIG_TRATS2_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <configs/exynos4-common.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define CONFIG_TIZEN			/* TIZEN lib */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_SYS_L2CACHE_OFF
19*4882a593Smuzhiyun #ifndef CONFIG_SYS_L2CACHE_OFF
20*4882a593Smuzhiyun #define CONFIG_SYS_L2_PL310
21*4882a593Smuzhiyun #define CONFIG_SYS_PL310_BASE	0x10502000
22*4882a593Smuzhiyun #endif
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* TRATS2 has 4 banks of DRAM */
25*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS		4
26*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		0x40000000
27*4882a593Smuzhiyun #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
28*4882a593Smuzhiyun #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
29*4882a593Smuzhiyun /* memtest works on */
30*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
31*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE		0x43e00000
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* select serial console configuration */
37*4882a593Smuzhiyun #define CONFIG_SERIAL2
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* Console configuration */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND		"run autoboot"
42*4882a593Smuzhiyun #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
45*4882a593Smuzhiyun 					- GENERATED_GBL_DATA_SIZE)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_BASE	0x00000000
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		CONFIG_MMC_DEFAULT_DEV
52*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			4096
53*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		((32 - 4) << 10) /* 32KiB - 4KiB */
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_CONFIG
58*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* Tizen - partitions definitions */
61*4882a593Smuzhiyun #define PARTS_CSA		"csa-mmc"
62*4882a593Smuzhiyun #define PARTS_BOOT		"boot"
63*4882a593Smuzhiyun #define PARTS_QBOOT		"qboot"
64*4882a593Smuzhiyun #define PARTS_CSC		"csc"
65*4882a593Smuzhiyun #define PARTS_ROOT		"platform"
66*4882a593Smuzhiyun #define PARTS_DATA		"data"
67*4882a593Smuzhiyun #define PARTS_UMS		"ums"
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define PARTS_DEFAULT \
70*4882a593Smuzhiyun 	"uuid_disk=${uuid_gpt_disk};" \
71*4882a593Smuzhiyun 	"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
72*4882a593Smuzhiyun 	"name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
73*4882a593Smuzhiyun 	"name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
74*4882a593Smuzhiyun 	"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
75*4882a593Smuzhiyun 	"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
76*4882a593Smuzhiyun 	"name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
77*4882a593Smuzhiyun 	"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define CONFIG_DFU_ALT \
80*4882a593Smuzhiyun 	"u-boot raw 0x80 0x800;" \
81*4882a593Smuzhiyun 	"/uImage ext4 0 2;" \
82*4882a593Smuzhiyun 	"/modem.bin ext4 0 2;" \
83*4882a593Smuzhiyun 	"/exynos4412-trats2.dtb ext4 0 2;" \
84*4882a593Smuzhiyun 	""PARTS_CSA" part 0 1;" \
85*4882a593Smuzhiyun 	""PARTS_BOOT" part 0 2;" \
86*4882a593Smuzhiyun 	""PARTS_QBOOT" part 0 3;" \
87*4882a593Smuzhiyun 	""PARTS_CSC" part 0 4;" \
88*4882a593Smuzhiyun 	""PARTS_ROOT" part 0 5;" \
89*4882a593Smuzhiyun 	""PARTS_DATA" part 0 6;" \
90*4882a593Smuzhiyun 	""PARTS_UMS" part 0 7;" \
91*4882a593Smuzhiyun 	"params.bin raw 0x38 0x8;" \
92*4882a593Smuzhiyun 	"/Image.itb ext4 0 2\0"
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
95*4882a593Smuzhiyun 	"bootk=" \
96*4882a593Smuzhiyun 		"run loaduimage;" \
97*4882a593Smuzhiyun 		"if run loaddtb; then " \
98*4882a593Smuzhiyun 			"bootm 0x40007FC0 - ${fdtaddr};" \
99*4882a593Smuzhiyun 		"fi;" \
100*4882a593Smuzhiyun 		"bootm 0x40007FC0;\0" \
101*4882a593Smuzhiyun 	"updatebackup=" \
102*4882a593Smuzhiyun 		"mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
103*4882a593Smuzhiyun 		" mmc dev 0 0\0" \
104*4882a593Smuzhiyun 	"updatebootb=" \
105*4882a593Smuzhiyun 		"mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
106*4882a593Smuzhiyun 	"mmcboot=" \
107*4882a593Smuzhiyun 		"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
108*4882a593Smuzhiyun 		"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
109*4882a593Smuzhiyun 		"run bootk\0" \
110*4882a593Smuzhiyun 	"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
111*4882a593Smuzhiyun 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
112*4882a593Smuzhiyun 	"verify=n\0" \
113*4882a593Smuzhiyun 	"rootfstype=ext4\0" \
114*4882a593Smuzhiyun 	"console=" CONFIG_DEFAULT_CONSOLE \
115*4882a593Smuzhiyun 	"kernelname=uImage\0" \
116*4882a593Smuzhiyun 	"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
117*4882a593Smuzhiyun 		"${kernelname}\0" \
118*4882a593Smuzhiyun 	"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
119*4882a593Smuzhiyun 		"${fdtfile}\0" \
120*4882a593Smuzhiyun 	"mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
121*4882a593Smuzhiyun 	"mmcbootpart=2\0" \
122*4882a593Smuzhiyun 	"mmcrootpart=5\0" \
123*4882a593Smuzhiyun 	"opts=always_resume=1\0" \
124*4882a593Smuzhiyun 	"partitions=" PARTS_DEFAULT \
125*4882a593Smuzhiyun 	"dfu_alt_info=" CONFIG_DFU_ALT \
126*4882a593Smuzhiyun 	"uartpath=ap\0" \
127*4882a593Smuzhiyun 	"usbpath=ap\0" \
128*4882a593Smuzhiyun 	"consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
129*4882a593Smuzhiyun 	"consoleoff=set console console=ram; save; reset\0" \
130*4882a593Smuzhiyun 	"spladdr=0x40000100\0" \
131*4882a593Smuzhiyun 	"splsize=0x200\0" \
132*4882a593Smuzhiyun 	"splfile=falcon.bin\0" \
133*4882a593Smuzhiyun 	"spl_export=" \
134*4882a593Smuzhiyun 		   "setexpr spl_imgsize ${splsize} + 8 ;" \
135*4882a593Smuzhiyun 		   "setenv spl_imgsize 0x${spl_imgsize};" \
136*4882a593Smuzhiyun 		   "setexpr spl_imgaddr ${spladdr} - 8 ;" \
137*4882a593Smuzhiyun 		   "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
138*4882a593Smuzhiyun 		   "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
139*4882a593Smuzhiyun 		   "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
140*4882a593Smuzhiyun 		   "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
141*4882a593Smuzhiyun 		   "spl export atags 0x40007FC0;" \
142*4882a593Smuzhiyun 		   "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
143*4882a593Smuzhiyun 		   "mw.l ${spl_addr_tmp} ${splsize};" \
144*4882a593Smuzhiyun 		   "ext4write mmc ${mmcdev}:${mmcbootpart}" \
145*4882a593Smuzhiyun 		   " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
146*4882a593Smuzhiyun 		   "setenv spl_imgsize;" \
147*4882a593Smuzhiyun 		   "setenv spl_imgaddr;" \
148*4882a593Smuzhiyun 		   "setenv spl_addr_tmp;\0" \
149*4882a593Smuzhiyun 	CONFIG_EXTRA_ENV_ITB \
150*4882a593Smuzhiyun 	"fdtaddr=40800000\0" \
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun /* GPT */
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun /* Security subsystem - enable hw_rand() */
155*4882a593Smuzhiyun #define CONFIG_EXYNOS_ACE_SHA
156*4882a593Smuzhiyun #define CONFIG_LIB_HW_RAND
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /* Common misc for Samsung */
159*4882a593Smuzhiyun #define CONFIG_MISC_COMMON
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun #define CONFIG_MISC_INIT_R
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun /* Download menu - Samsung common */
164*4882a593Smuzhiyun #define CONFIG_LCD_MENU
165*4882a593Smuzhiyun #define CONFIG_LCD_MENU_BOARD
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun /* Download menu - definitions for check keys */
168*4882a593Smuzhiyun #ifndef __ASSEMBLY__
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun #define KEY_PWR_PMIC_NAME		"MAX77686_PMIC"
171*4882a593Smuzhiyun #define KEY_PWR_STATUS_REG		MAX77686_REG_PMIC_STATUS1
172*4882a593Smuzhiyun #define KEY_PWR_STATUS_MASK		(1 << 0)
173*4882a593Smuzhiyun #define KEY_PWR_INTERRUPT_REG		MAX77686_REG_PMIC_INT1
174*4882a593Smuzhiyun #define KEY_PWR_INTERRUPT_MASK		(1 << 1)
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun #define KEY_VOL_UP_GPIO			EXYNOS4X12_GPIO_X22
177*4882a593Smuzhiyun #define KEY_VOL_DOWN_GPIO		EXYNOS4X12_GPIO_X33
178*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun /* LCD console */
181*4882a593Smuzhiyun #define LCD_BPP                 LCD_COLOR16
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun /* LCD */
184*4882a593Smuzhiyun #define CONFIG_BMP_16BPP
185*4882a593Smuzhiyun #define CONFIG_FB_ADDR		0x52504000
186*4882a593Smuzhiyun #define CONFIG_EXYNOS_MIPI_DSIM
187*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_GZIP
188*4882a593Smuzhiyun #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun #endif	/* __CONFIG_H */
191